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參數(shù)資料
| 型號： | MC33389CDH |
| 廠商： | MOTOROLA INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | System Basis Chip with Low Speed Fault Tolerant CAN |
| 中文描述： | DATACOM, INTERFACE CIRCUIT, PDSO20 |
| 封裝： | POWER, HSOP-20 |
| 文件頁數(shù)： | 16/35頁 |
| 文件大?。?/td> | 609K |
| 代理商： | MC33389CDH |
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MC33389
16
MC33389
WAKE-UP CAPABILITIES
Several wake up capabilities are available.
Forced Wake-up
The forced wake-up is enabled and disabled by SPI in
V3R register. It is used in sleep mode to automatically wake-
up the system by supplying V1 with proper reset. This
correspond to jump into NormalRequest mode. If then, the
SBC is not properly configured within 75ms, it switches back
to sleep mode till the next wake-up. If both Cyclic sense and
forced wake-up are enabled by the SPI in sleep mode, only
Cyclic sense will be active.
The period of forced wake-up are 32ms, 64ms, 128ms,
256ms, 512ms, 1024ms, 2048ms, 8192ms, chosen by SPI in
CYTCR register.
Wake-up Inputs (Local Wake-up) / Cyclic Sense
SBC provides 3 wake-up inputs to monitor external events
such as closing/opening of switches. The wake-up feature is
available in Normal, Standby and sleep modes. The switches
can be directly connected to V
bat
or to V3. The SBC must be
properly configured by setting bit WI2V3 in register V3R. In
this case, wake-ups are only detected when V3 is On. It can
take advantage of V3 cyclic sense feature. If both Cyclic
sense and forced wake-up are enabled by the SPI in sleep
mode, only Cyclic sense will be active.
Options For Wake Input
Different conditions for wake-up can be chosen for wake-
up input pins (via SPI in WUICR register).
No wake-up: No wake-up is detected, whatever occurs on
wake-up inputs.
High state: if the input pin voltage is above the detection
threshold during more than a 20
μ
s filter time, a wake-up is
detected. A flag is set in the WUISR register.
Low state: if the input pin voltage is below the detection
threshold during more than a 20
μ
s filter time, a wake-up is
detected. A flag is set in the WUISR register.
Change of state: each change of the wake-up input pin is
considered as a wake-up, if it lasts more than a 20
μ
s filter
time. The first reference state (no wake-up) is the wake-up
input state when the SBC is programmed to this option. A flag
is set in the WUISR register.
Multiple sampling events: when wake-up inputs are used
with V3 in cyclic sense in sleep mode.
For positive edge sensitivity, 2 samples Low followed by 2
samples High are necessary to validate the wake-up
condition.
For negative edge sensitivity, 2 samples High followed by
2 samples Low are necessary to validate the wake-up
condition.
For both edge sensitivity, 2 samples at a given state
followed by 2 samples in the opposite state are necessary to
validate the wake-up condition.
Wake-up Inputs With Cyclic Sense
Connecting the external switches to V3 allows power
saving since V3 can be programmed to be active, passive or
cyclic (cyclic sense). This gives a great flexibility to reduce
total power consumption while allowing full wake-up
capabilities. Cyclic sense is available only in sleep mode.
The period of the Cyclic sense can be chosen out of 8
different timings: 32ms, 64ms, 128ms, 256ms, 512ms,
1024ms, 2048ms, 8192ms programmable via SPI in CYTCR
register. Once activated, V3 remains ‘on’ during 400
μ
s. The
wake-up inputs states are sampled at 300
μ
s.
Figure 16. V3 Timing
Note: In sleep mode, the Cyclic Sense feature
‘EXCLUSIVE OR’ the forced Wake-up is chosen (not both).
Figure 17. Cyclic Sense Timing
Wake Up Inputs With Permanent Sense
Wake up detection can also be done on a permanent way
in Normal and Standby mode. If the contacts are connected to
V3, wake ups are only detected if V3 is on.
Wake ups are also detected on a permanent way in sleep
mode if the contacts are directly connected to V
bat
(if they are
connected to V3, only cyclic sense is available in sleep mode).
Local Wake-up Consequences
In normal or standby modes, the real time state of each
wake-up input pin is stored in the readable register WUIRTI.
Wake-ups are detected according to the option chosen. A flag
is set in the WUISR register. A maskable interrupt is sent via
INTB output.
In sleep mode, a local wake-up leads to a jump to
NormalRequest mode (via proper reset of the microcontroller). A
flag is set in the WUISR register.
Table 18. SBC Mode Versus Local Wake-up Behaviour
SBC Modes
Local Wake-up Behaviour
NormalRequest
No detection
300us
400us
V3passive
active
cyclic sense programmable period
wake-up inputs sample point
1
1
1
0
0
0
0
1
1
actual state (read)
memory state
INTB (wake-up active=0)
0
80ms
(t1)
160ms
V3
wake-up
switch status
V(L1)
Read L1
INTB
(t0)
OPEN
CLOSED
read
μ
s
setup
μ
s
sample point (80%)
zoomed
Cyclic sense connected to wake-up inputs. Example with wake-up input L1
sensitivity to Low state and timing=80ms
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC33389CDHR2 | 功能描述:IC SYSTEM BASE W/CAN 20-HSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| MC33389CDW | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SYSTEM BASIC CHIPS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MC33389CDWR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SYSTEM BASIC CHIPS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MC33389DDW | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC SOW28 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MC33389DDWR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC SOW28 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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