參數(shù)資料
型號: MC33389DDW
廠商: Freescale Semiconductor
文件頁數(shù): 38/49頁
文件大?。?/td> 0K
描述: IC SYSTEM BASE W/CAN 28-SOIC
標(biāo)準(zhǔn)包裝: 1
控制器類型: 系統(tǒng)基礎(chǔ)芯片
接口: CAN
電源電壓: 5.5 V ~ 18 V
電流 - 電源: 45mA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
Analog Integrated Circuit Device Data
Freescale Semiconductor
43
33389
TYPICAL APPLICATIONS
Figure 25. Typical Application Schematic 2
The SBC offers several capabilities to help users debug
their application.
External bias of V1 and reset pin
Turn OFF software watchdog in the Stand-by mode
Special debug samples with software watchdog disable at
power-up (contact local Motorola representative)
DEBUG AND PROGRAM DOWNLOAD INTO FLASH
MEMORY
While the SBC is powered, it enters Normal Request mode
and expects during the 75 ms time period in the NR mode, an
SPI trigger word (to enter Normal mode and select the
watchdog time period). If this does not occur, the SBC enters
the Sleep mode and turns off V1.
When the software is debugged, and when using
development tools, it is not always easy to make sure these
events happen properly. It is thus possible to externally
power the V1 line with an external 5.0 V supply, and to force
the Reset pin to V1 or to and external 5.0 V. These can be
done at nominal voltage and temperature. By doing this, 5.0
V is provided to the MCU VDD and reset lines.
Under this condition the SBC is not operational. However,
the reset pin is pulled low and is sinking 5 mA to ground. This
means, the external circuitry driving reset must have a
current capability higher than 5 mA in order to drive the reset
in the high-state.
DISABLE OF SOFTWARE WATCHDOG IN STAND-
BY MODE
The software watchdog can be disable in Stand-by mode
only. In order to disable it the following operation must be
done:
Write to MCR register–data 011 (bit 2, bit 1, bit 0)
Write to MCVR register–data 011 (bit 2, bit 1, bit 0)
Then the SBC enters the Stand-by mode without software
watchdog. However the V2 can not be turn on, and the CAN
cell can not be used.
(Wake-up input linked to peripheral circuits: (ex: low speed CAN or LIN transceivers).
V1
VBAT
V2
RST
INT
CS
MISO
MOSI
SCK
TX
RX
CANH
CANL
RTL
RTH
V3
L0
L1
L2
C5
C6
C1
C2
Rp0
RL
RH
GND
CAN 1
SPI
VDD
INT
RESET
Auxiliary 5V
Auxiliary 12V
S0
Rs0
CL0
Ignition
CAN bus # 1
CANH
CANL
RTL
RTH
RL
RH
CAN bus # 2
GND
INH
MC33388
LIN
1k
LIN bus
GND
INH
MC33399
+12V
VBAT
VDD
VSUP
CAN 2
SCI
SPI bus
Tx/Rx
33389
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