參數(shù)資料
型號: MC33880
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Configurable Octal Serial Switch with Serial Peripheral Interface I/O(可配置的8串行開關(guān),帶串行外圍I/O口(SPI))
中文描述: 配置八路系列開關(guān)串行外設(shè)接口輸入/輸出(可配置的8串行開關(guān),帶串行外圍的I / O口(SPI)的)
文件頁數(shù): 16/24頁
文件大?。?/td> 741K
代理商: MC33880
33880
16
Go to: www.freescale.com
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33880 is an eight-output hardware configurable power
switch with 8-bit serial control. The 33880 incorporates
SMARTMOS
5 technology with CMOS logic, bipolar/MOS
analog circuitry, and independent double diffused DMOS power
output transistors. Many benefits are realized as a direct result
of using this mixed technology. A simplified internal block
diagram of the 33880 is shown in
Figure 1
, page 2.
The 33880 device uses high-efficiency updrain power DMOS
output transistors exhibiting low drain-to-source ON resistance
values (R
DS(ON)
0.55
at 25
°
C) and dense CMOS control
logic. All outputs have independent voltage clamps to provide
fast inductive turn-off and transient protection. Operational bias
currents of less than 4.0 mA on V
DD
and 12 mA on V
PWR
with
any combination of outputs ON are a direct result of using
SMARTMOS
5 technology.
MCU INTERFACE DESCRIPTION
In operation the 33880 functions as an eight-output serial
switch serving as a microcontroller (MCU) bus expander and
buffer with fault management and fault reporting features. In
doing so, the device directly relieves the MCU of the fault
management functions. This device directly interfaces to an
MCU using a Serial Peripheral Interface (SPI) for control and
diagnostic readout.
Figure 18
(below) and
Figure 21
, page 17,
illustrate the basic SPI configuration between an MCU and one
33880.
Figure 18. SPI Interface with Microcontroller
All inputs are compatible with 5.0 V and 3.3 V CMOS logic
levels and incorporate positive logic. Whenever an input is
programmed to a logic low state (<0.8 V) the corresponding
output will be OFF. Conversely, whenever an input is
programmed to a logic high state (>2.2 V), the output being
controlled will be ON. Diagnostics are treated in a similar
manner. Outputs with a fault will feedback (via DO) to the
microcontroller as a logic [1] while normal operating outputs will
provide a logic [0].
Figure 19
illustrates the Daisy Chain configuration using the
33880. Data from the MCU is clocked daisy chain through each
device while the Chip Select (
CS
) bit is commanded low by the
MCU. During each clock cycle output status from the daisy
chain, the 33880 is being transferred to the MCU via the Master
In Slave Out (MISO) line. On rising edge of
CS
data stored in
the input register is then transferred to the output driver.
Figure 19. 33880 SPI System Daisy Chain
Multiple 33880 devices can be controlled in a parallel input
fashion using the SPI.
Figure 20
illustrates 24 loads being
controlled by three dedicated parallel MCU ports used for chip
select.
Figure 20. Parallel Input SPI Control
Receive
Buffer
Parallel
Ports
To
Logic
33880
MC68HCxx
Microcontroller
DO
DI
CS
SCLK
MISO
MOSI
Shift Regist
er
Shift Register
MC68xx
MCU
with
SPI Interface
8 Outputs
8 Outputs
8 Outputs
CS
MISO
MOSI
Parallel Port
SCLK
DO
DI
DO
DI
DO
DI
CS
CS
SCLK
SCLK
33880
33880
33880
DI
SCLK
DO
CS
Parallel
Ports
MOSI
SCLK
MISO
8 Outputs
MC68xx
Microcontroller
SPI
A
B
C
DI
SCLK
DO
CS
8 Outputs
DI
SCLK
DO
CS
8 Outputs
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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