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參數(shù)資料
| 型號(hào)： | MC33972 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Multiple Switch Detection Interface with Suppressed Wake-Up(帶抑制喚醒功能的多開關(guān)檢測接口) |
| 中文描述： | 多交換檢測接口，具有抑制喚醒（帶抑制喚醒功能的多開關(guān)檢測接口） |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 819K |
| 代理商： | MC33972 |
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33972/D
9
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33972 device is an integrated circuit designed to provide
systems with ultra-low quiescent sleep/wake-up modes and a
robust interface between switch contacts and a
microprocessor. The 33972 replaces many of the discrete
components required when interfacing to microprocessor-
based systems while providing switch ground offset protection,
contact wetting current, and system wake-up.
The 33972 features 8-programmable switch-to-ground or
switch-to-battery inputs and 14 switch-to-ground inputs. All
switch inputs may be read as analog inputs through the analog
multiplexer (AMUX). Other features include a programmable
wake-up timer, programmable interrupt timer, programmable
wake-up/interrupt bits, and programmable wetting current
settings.
This device is designed primarily for automotive applications
but may be used in a variety of other applications such as
computer, telecommunications, and industrial controls.
FUNCTIONAL PIN DESCRIPTION
CS
The system MCU selects the 33972 to receive
communication using the chip select (
CS
) pin. With the
CS
in a
logic low state, command words may be sent to the 33972 via
the serial input (SI) pin, and switch status information can be
received by the MCU via the serial output (SO) pin. The falling
edge of
CS
enables the SO output, latches the state of the
INT
pin, and the state of the external switch inputs.
Rising edge of the
CS
initiates the following operation:
1. Disables the SO driver (high impedance)
2.
INT
pin is reset to logic [1], except when additional switch
changes occur during
CS
low. (See
Figure 4
on page 8.)
3. Activates the received command word, allowing the
33972 to act upon new data from switch inputs.
To avoid any spurious data, it is essential the high-to-low and
low-to-high transitions of the
CS
signal occur only when SCLK
is in a logic low state. Internal to the 33972 device is an active
pull-up to V
DD
on
CS
.
In Sleep mode the negative edge of
CS
(V
DD
applied) will
wake up the 33972 device. Data received from the device
during
CS
wake-up may not be accurate.
SCLK
The system clock (SCLK) pin clocks the internal shift register
of the 33972. The SI data is latched into the input shift register
on the falling edge of SCLK signal. The SO pin shifts the switch
status bits out on the rising edge of SCLK. The SO data is
available for the MCU to read on the falling edge of SCLK. False
clocking of the shift register must be avoided to ensure validity
of data. It is essential the SCLK pin be in a logic low state
whenever
CS
makes any transition. For this reason, it is
recommended, though not necessary, that the SCLK pin is
commanded to a low logic state as long as the device is not
accessed and
CS
is in a logic high state. When the
CS
is in a
logic high state, any signal on the SCLK and SI pins will be
ignored and the SO pin is tri-state.
SI
The SI pin is used for serial instruction data input. SI
information is latched into the input register on the falling edge
of SCLK. A logic high state present on SI will program a
one
in
the command word on the rising edge of the
CS
signal. To
program a complete word, 24 bits of information must be
entered into the device.
SO
The SO pin is the output from the shift register. The SO pin
remains tri-stated until the
CS
pin transitions to a logic low state.
All
open switches
are reported as
zero
, all
closed switches
are
reported as
one
. The negative transition of
CS
enables the SO
driver.
The first positive transition of SCLK will make the status data
bit 24 available on the SO pin. Each successive positive clock
will make the next status data bit available for the MCU to read
on the falling edge of SCLK. The SI/SO shifting of the data
follows a first-in-first-out protocol, with both input and output
words transferring the most significant bit (MSB) first.
INT
The
INT
pin is an interrupt output from the 33972 device. The
INT
pin is an open-drain output with an internal pull-up to V
DD
.
In Normal mode, a switch state change will trigger the
INT
pin
(when enabled). The
INT
pin and INT bit in the SPI register are
latched on the falling edge of
CS
. This permits the MCU to
determine the origin of the interrupt. When two 33972 devices
are used, only the device initiating the interrupt will have the
INT bit set. The
INT
pin is cleared on the rising edge of
CS
. The
INT
pin will not clear with rising edge of
CS
if a switch contact
change has occurred while
CS
was low.
In a multiple 33972 device system with
WAKE
high and V
DD
on (Sleep mode), the falling edge of
INT
will place all 33972s in
Normal mode.
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC33972ATEK | 功能描述:接口 - 專用 MULT SW DET SUP-WKUP RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| MC33972ATEKR2 | 功能描述:接口 - 專用 MULT SW DET SUP-WKUP RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| MC33972ATEW | 功能描述:接口 - 專用 MULT SW DET SUP-WKUP RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| MC33972ATEWR2 | 功能描述:接口 - 專用 MULT SW DET SUP-WKUP RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| MC33972DWB | 功能描述:IC SWITCH DETECT SPI 32-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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