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參數(shù)資料
| 型號： | MC44011FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | BUS CONTROLLED MULTISTANDARD VIDEO PROCESSOR |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 9/52頁 |
| 文件大?。?/td> | 835K |
| 代理商： | MC44011FB |
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MC44011
9
MOTOROLA ANALOG IC DEVICE DATA
PIN FUNCTION DESCRIPTION
FB
FN
QFP
PLCC
Representative Circuitry
(Pin numbers refer to PLCC package)
Description
Pin
(Pin numbers refer to PLCC package)
39, 41
1, 3
0.47
Video
Input
470
47 pF
10 M
20 k
Video Input 1 & 2
– Video 1 (Pin 1) and Video 2
(Pin 3) are composite video inputs. Either can be
NTSC or PAL. Input impedance is high, termination
must be external. Also used for the luma and chroma
components of an S–VHS signal. Selection of these
inputs is done by software. External components
protect against ESD and noise.
40
2
2
0.1
ACC Filter
– A 0.1
μ
F capacitor at this pin filters the
feedback loop of the chroma automatic gain control
amplifier. Input chroma burst amplitude can be
between 30 and 600 mVpp.
42
4
5.0
10 k
Vertical Sync
4
Vertical Sync Output
– An open collector output
requiring an external pull–up. Output is an active low
pulse, 500
μ
s wide, occurring each field. Timing of this
pulse depends on Bit $78–7.
43
5
100 k
From MCU
5
SCL
– Clock for the I2C bus interface. See Appendix C
for specifications. Maximum frequency is 100 kHz.
44
6
180 k
To/From MCU
6
SDL
– Bidirectional data line for the I2C bus interface.
As an output, it is an open collector. (Write Address
$8A, Read Address $8B)
1
7
100 k
12 k
Field ID
7
Field ID
– TTL level output indicating Field 1 or Field 2.
Polarity depends on state of Bit $78–7 (Vertical Sync
Delay). See Table 11 and Figure 33 and 34.
2
8
(Same as Pin 7)
Burst Gate
– TTL level output used for external
clamps, as well as internally. Pulse is active high,
≈
3.5
μ
s wide, with the rising edge
≈
3.0
μ
s after
center of selected incoming sync pulse.
3
9
2.2
μ
F / /
0.01
110 k
5.0
20 k
8.0 k
9
Reference Current Input
– Current supplied to this
pin, typically 32
μ
A from 5.0 V through a 110 k
resistor, is the reference current for the calibration
circuit. Noise filtering should be done at the pin.
Voltage at this pin is typically 1.2 V.
4
10
(See power distribution diagram at the end of this section.)
Quiet Ground
– Ground for the horizontal PLL filter
(PLL #1) at Pin 11.
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