參數(shù)資料
型號(hào)： MC44460B
廠(chǎng)商： MOTOROLA INC
元件分類(lèi)： 畫(huà)面疊加
英文描述： PICTURE-IN-PICTURE (PIP) CONTROLLER
中文描述： PICTURE-IN-PICTURE IC, PDIP56
封裝： SHRINK, PLASTIC, DIP-56
文件頁(yè)數(shù)： 13/16頁(yè)
文件大?。?/td> 439K
代理商： MC44460B
MC44460
13
MOTOROLA ANALOG IC DEVICE DATA
address, allows the read address to the memory to be
modified to correct for interlace disorder.
The read logic can provide various border colors: black,
75% white (light gray), 50% white (medium gray), red, green,
blue or transparent (no border). In a system without an
adaptive comb filter, borders which contain no chroma give
the best results. Also built into the read logic is a PIP fill mode
which allows the PIP window to be filled with either a solid
green, blue or red color as an aid in aligning the PIP analog
color circuitry.
Because the DAC output video will be referenced during
back porch time, the read processor zeroes the luminance
value and sets the bipolar U and V values to mid–range
during periods outside the PIP window to ensure clamping at
correct levels. Since the PIP window is positioned relative to
the main picture’s vertical and horizontal sync, a safety
feature turns off the window if the window encroaches upon
the sync period, thus preventing erroneous clamping.
The Y, U and V DACs are all three of the same design. A
binary weighted current source is used, split into two, three
bit levels. In the three most significant bits, the current
sources are cascaded to improve the matching to the three
least significant current sources. Analog transmission gates,
switched by the bi–phase outputs of the data latches, feed
the binary currents to the single ended current mirror. The
output current is subsequently clamped and filtered for
processing buy the NTSC Encoder.
The outputs of the U and V DACS are buffered and burst
flag pulses added to both signals. The U burst flag is fixed to
generate a –180
°
color burst at the modulator output. The V
burst flag is variable under the control of an internal register
set through the I2C bus to provide a variable tint. Saturation is
controlled by varying a register which sets the reference
voltage to the U and V DACs. This is also under I2C bus
control. By oversampling the U and V DACs, it was possible
to use identical post–DAC filtering for Y, U and V, thereby
reducing the delay inequalities between Y and UV and also
simplifying the design. After filtering, the U and V signals are
clamped to an internal reference voltage during horizontal
blanking periods and fed to the U and V modulators. In the
NTSC Decoder, the Y, U and V signals were scaled to use the
entire A/D range. Gain through the NTSC Encoder is set to
properly match these amplitudes.
The phase of the re–encoded chrominance must match
that of the incoming main video signal at the input to the PIP
switch, so a separate first order PLL is placed within the loop
of the main video signal burst PLL. The first order PLL
compares the phase of the main burst with that of the
encoded burst and moves the oscillator phase so that they
match. A special phase shift circuit allowing a continuous
range of 180
°
was developed to do this.
The amplitude of the re–encoded chrominance signal
must also match that of the main video signal. To do this, a
synchronous amplitude comparator looks at both burst
signals and adjusts the chrominance amplitude in the
modulator section of the NTSC encoder. The Y signal from
the YDAC is compared to the main video signal at black level
during back porch time and clamped to this same black level
voltage. The PIP chrominance and luminance are then
added together and fed to the PIP output switch through a
buffered output.
相關(guān)PDF資料
PDF描述
MC44460 PICTURE-IN-PICTURE (PIP) CONTROLLER
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