參數(shù)資料
型號: MC56F8006MLF
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BBC, LQFP-48
文件頁數(shù): 60/106頁
文件大?。?/td> 1215K
代理商: MC56F8006MLF
Specifications
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor
57
8.13
AC Electrical Characteristics
Tests are conducted using the input levels specified in Table 22. Unless otherwise specified, propagation delays are measured
from the 50% to the 50% point, and rise and fall times are measured between the 10% and 90% points, as shown in Figure 25.
Figure 25. Input Signal Measurement References
Figure 26 shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Table 28. Crystal Oscillator Characteristics
Characteristic
Symbol
Min
Typ1
1 Data in Typical column was characterized at 3.0 V, 25
C or is typical recommended value.
Max
Unit
Oscillator crystal or resonator (PRECS = 1, CLK_MOD = 0)
Low range (RANGE = 0)
High range (RANGE = 1), high gain (COHL =0)
High range (RANGE = 1), low power (COHL =1)
flo
fhi
32
1
38.4
16
8
kHz
MHz
Load capacitors
Low range (RANGE=0), low power (COHL =1)
Other oscillator settings
C1,C2
See Note2
See Note3
2 Load capacitors (C
1,C2), feedback resistor (RF) and series resistor (RS) are incorporated internally when
RANGE=HGO=0.
3 See crystal or resonator manufacturer’s recommendation.
Feedback resistor
Low range, low power (RANGE=0, COHL =1)2
Low range, high gain (RANGE=0, COHL =0)
High range (RANGE=1, COHL=X)
RF
10
1
M
Series resistor
Low range, low power (RANGE = 0, COHL =1)2
Low range, high gain (RANGE = 0, COHL =0)
High range, low power (RANGE = 1, COHL =1)
High range, high gain (RANGE = 1,COHL =0)
8 MHz
4 MHz
1 MHz
RS
0
100
0
0
10
20
k
Crystal start-up time 4
Low range, low power
Low range, high gain
High range, low power
High range, high gain
4 Proper PC board layout procedures must be followed to achieve specifications.
t
CSTL
t
CSTH
TBD
ms
Square wave input clock frequency (PRECS = 1, CLK_MOD = 1)
fxtal
50.0
MHz
VIH
VIL
Fall Time
Midpoint1
Low
High
90%
50%
10%
Rise Time
The midpoint is VIL + (VIH – VIL)/2.
Input Signal
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