參數(shù)資料
型號: MC56F8006MWL
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PDSO28
封裝: 7.50 X 18 MM, ROHS COMPLIANT, MS-013AE, SOIC-28
文件頁數(shù): 26/106頁
文件大小: 1215K
代理商: MC56F8006MWL
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Signal/Connection Descriptions
Freescale Semiconductor
26
TDI
(GPIOD0)
(ANB12)
(SS)
(TIN2)
(CMP0_
OUT)
23
30
26
45
Input
Input/
Output
Analog
Input
Output
Input,
internal
pullup
enabled
Test Data Input — This input pin provides a serial input data stream
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
and has an on-chip pullup resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB12 — Analog input to channel 12 of ADCB
SS — SS is used in slave mode to indicate to the SPI module that
the current transfer is to be received.
TIN2 — Dual timer module channel 2 input.
CMP1_OUT — Analog comparator 1 output.
After reset, the default state is TDI.
TDO
(GPIOD1)
(ANB10)
(T0)
(CMP2_
OUT)
25
32
28
48
Output
Input/
Output
Analog
Input
Input/
Output
Output,
tri-stated,
internal
pullup
enabled
Test Data Output — This three-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANB10 — Analog input to channel 10 of ADCB.
T0 — Dual timer module channel 0 input/output.
CMP2_OUT — Analog comparator 2 output.
After reset, the default state is TDO.
TCK
(GPIOD2)
(ANA4 and
CMP1_P2)
(CMP2_
OUT)
9
14
10
22
Input
Input/
Output
Analog
Input
Output
Input,
internal
pullup
enabled
Test Clock Input — This input pin provides a gated clock to
synchronize the test logic and shift serial data to the JTAG/EOnCE
port. The pin is connected internally to a pullup resistor. A
Schmitt-trigger input is used for noise immunity.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANA4 and CMP1_P2 — Analog input to channel 4 of ADCA and
positive input 2 of analog comparator 1.
CMP2_OUT — Analog comparator 2 output.
After reset, the default state is TCK.
Table 5. 56F8006/56F8002 Signal and Package Information (continued)
Signal
Name
28
SOIC
32
LQFP
32
PSDI
P
48
LQFP
Type
State
During
Reset
Signal Description
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