參數(shù)資料
型號： MC56F8155VFGE
廠商： Freescale Semiconductor
文件頁數(shù)： 100/172頁
文件大小： 0K
描述： IC DSP 16BIT 40MHZ 128-LQFP
標(biāo)準(zhǔn)包裝： 72
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 40MHz
連通性： EBI/EMI，SCI，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 49
程序存儲器容量： 256KB（128K x 16）
程序存儲器類型： 閃存
RAM 容量： 8K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x12b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 128-LQFP
包裝： 托盤
Signal Pins
56F8355 Technical Data, Rev. 17
Freescale Semiconductor
33
Preliminary
TD0
(GPIOE10)
107
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pullup
enabled
TD0 - TD3 — Timer D, Channels 0, 1, 2 and 3
Port E GPIO — These GPIO pins can be individually programmed
as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pullup resistor, clear the appropriate bit
of the GPIOE_PUR register. See Part 6.5.6 for details.
TD1
(GPIOE11)
108
TD2
(GPIOE12)
109
TD3
(GPIOE13)
110
IRQA
52
Schmitt
Input
Input,
pullup
enabled
External Interrupt Request A and B — The IRQA and IRQB
inputs are asynchronous external interrupt requests during Stop
and Wait mode operation. During other operating modes, they are
synchronized external interrupt requests, which indicate an
external device is requesting service. They can be programmed to
be level-sensitive or negative-edge triggered.
To deactivate the internal pullup resistor, set the IRQ bit in the
SIM_PUDR register. See Part 6.5.6 for details.
IRQB
53
RESET
78
Schmitt
Input
Input,
pullup
enabled
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed
in the reset state. A Schmitt trigger input is used for noise
immunity. The internal reset signal will be deasserted
synchronous with the internal clocks after a fixed number of
internal clocks.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and the
JTAG/EOnCE module must not be reset. In this case, assert
RESET but do not assert TRST.
Note: The internal Power-On Reset will assert on initial power-up.
To deactivate the internal pullup resistor, set the RESET bit in the
SIM_PUDR register. See Part 6.5.6 for details.
RSTO
77
Output
Reset Output — This output reflects the internal reset state of the
chip.
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8156 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8156VFV 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述:
MC56F8156VFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8157 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-BIT HYBRID CONTROLLERS
MC56F8157VPY 制造商:Rochester Electronics LLC 功能描述:- Bulk
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