參數(shù)資料
型號： MC56F8157VPY
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝： PLASTIC, LQFP-160
文件頁數(shù)： 66/177頁
文件大?。?/td> 4091K
代理商： MC56F8157VPY
56F8357 Technical Data, Rev. 15
158
Freescale Semiconductor
Preliminary
C, the internal [dynamic component], is classic C*V2*F CMOS power dissipation corresponding to the
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V2*F, although simulations on two
of the IO cell types used on the device reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change. Table 10-25 provides coefficients for calculating power dissipated
in the IO cells as a function of capacitive load. In these cases:
TotalPower =
Σ((Intercept +Slope*Cload)*frequency/10MHz)
where:
Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
Cload is expressed in pF
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found
to be fairly low when averaged over a period of time. The one possible exception to this is if the chip is
using the external address and data buses at a rate approaching the maximum system rate. In this case,
power from these buses can be significant.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the
device. Sum the total of all V2/R or IV to arrive at the resistive load contribution to power. Assume V = 0.5
for the purposes of these rough calculations. For instance, if there is a total of 8 PWM outputs driving
10mA into LEDs, then P = 8*.5*.01 = 40mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,
as it is assumed to be negligible.
Table 10-25 IO Loading Coefficients at 10MHz
Intercept
Slope
PDU08DGZ_ME
1.3
0.11mW / pF
PDU04DGZ_ME
1.15mW
0.11mW / pF
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MC56F8357,
MC56F8157
相關(guān)PDF資料
PDF描述
MC56F8157VPYE 16-BIT, 120 MHz, OTHER DSP, PQFP160
MC56F8357VPY60 16-BIT, 120 MHz, OTHER DSP, PQFP160
MC56F8166VFV 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8366MFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8366VFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8157VPYE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8157VVFE 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:56F8xxx 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:8KB（8K x 8） 程序存儲(chǔ)器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC56F8165 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8165E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8165VFG 制造商:Rochester Electronics LLC 功能描述:- Bulk
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