參數(shù)資料
型號: MC56F8346
廠商: Motorola, Inc.
英文描述: 56F8346 16-bit Hybrid Controller
中文描述: 56F8346 16位混合控制器
文件頁數(shù): 96/160頁
文件大?。?/td> 1415K
代理商: MC56F8346
96
56F8346 Technical Data
Preliminary
5.6.30.7 IRQA State Pin (IRQA STATE)—Bit 2
This
read-only
bit reflects the state of the external IRQA pin.
5.6.30.8 IRQB Edge Pin (IRQB Edg)—Bit 1
This bit controls whether the external IRQB interrupt is edge- or level-sensitive. During Stop and
Wait modes, it is automatically level-sensitive.
0 = IRQB interrupt is a low-level sensitive (default)
1 = IRQB interrupt is falling-edge sensitive.
5.6.30.9 IRQA Edge Pin (IRQA Edg)—Bit 0
This bit controls whether the external IRQA interrupt is edge- or level-sensitive. During Stop and
Wait modes, it is automatically level-sensitive.
0 = IRQA interrupt is a low-level sensitive (default)
1 = IRQA interrupt is falling-edge sensitive.
5.7 Resets
5.7.1
The ITCN provides the 56800E core with a reset vector address whenever RESET is asserted. The
reset vector will be presented until the second rising clock edge after RESET is released.
Reset Handshake Timing
5.7.2
After reset, all of the ITCN registers are in their default states. This means all interrupts are
disabled, except the core IRQs with fixed priorities:
ITCN After Reset
Illegal Instruction
SW Interrupt 3
HW Stack Overflow
Misaligned Long Word Access
SW Interrupt 2
SW Interrupt 1
SW Interrupt 0
SW Interrupt LP
These interrupts are enabled at their fixed priority levels.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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MC56F8346EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Contents:Inst
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MC56F8346VFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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