參數(shù)資料
型號: MC56F8355MFGE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: ROHS COMPLIANT, PLASTIC, LQFP-128
文件頁數(shù): 107/172頁
文件大小: 844K
代理商: MC56F8355MFGE
56F8355 Technical Data, Rev. 17
4
Freescale Semiconductor
Preliminary
56F8355/56F8155 General Description
Note: Features in italics are NOT available in the 56F8155 device.
56F8355/56F8155 Block Diagram
Up to 60 MIPS at 60MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
256KB Program Flash
4KB Program RAM
8KB Data Flash
16KB Data RAM
16KB Boot Flash
Up to two 6-channel PWM modules
Four 4-channel, 12-bit ADCs
Temperature Sensor
Up to two Quadrature Decoders
FlexCAN module
Two Serial Communication Interfaces (SCIs)
Up to two Serial Peripheral Interface (SPIs)
Up to four general purpose Quad Timers
Computer Operating Properly (COP)/Watchdog
JTAG/Enhanced On-Chip Emulation (OnCE) for
unobtrusive, real-time debugging
Up to 49 GPIO lines
128-pin LQFP Package
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or
GPIOC
Program Controller
and Hardware
Looping Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
16-Bit
56800E Core
Interrupt
Controller
COP/
Watchdog
SCI1 or
GPIOD
4
2
IRQA
IRQB
Program Memory
128K x 16 Flash
2K x 16 RAM
Boot ROM
8K x 16 Flash
Data Memory
4K x 16 Flash
8K x 16 RAM
PDB
XAB1
XAB2
XDB2
CDBR
SCI0 or
GPIOE
IPBus Bridge (IPBB)
Decoding
Peripherals
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
2
System Bus
R/W Control
Memory
PAB
CDBW
CDBR
CDBW
JTAG/
EOnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
VCAP
VDD
VSS VDDA
VSSA
5
47
5
2
VPP
2
RESET
RSTO
4
6
3
4
6
3
Quad Timer D
or GPIOE
Quad Timer C
or GPIOE
ADCA
4
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
FlexCAN
2
4
2
ADCB
Temp_Sense
4
* External
Address Bus
Switch
Exte
rnal
Bus
Inte
rf
ace
Unit
* External
Data
Bus Switch
A8-13 or GPIOA0-5
D7-10 or GPIOF0-3
GPIOB0-4 or A16-20
GPIOD0-5 or CS2-7
* Bus
Control
6
5
6
* EMI not functional in
this package; use as
GPIO pins
PLL
Clock
Generator
XTAL
EXTAL
CLKMODE
Integration
Module
System
P
O
R
O
S
C
Clock
resets
CLKO
PWM Outputs
Fault Inputs
PWMA
Current Sense Inputs
or GPIOC
PWM Outputs
Fault Inputs
PWMB
Current Sense Inputs
or GPIOD
OCR_DIS
4
SPI0 or
GPIOE
AD0
AD1
4
VREF
AD0
AD1
4
5
4
Control
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