參數(shù)資料
型號(hào)： MC56F8356MFV60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 56F8356 16-bit Hybrid Controller
中文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝： LQFP-144
文件頁數(shù)： 113/160頁
文件大小： 1380K
代理商： MC56F8356MFV60
Stop and Wait Mode Disable Function
56F8356 Technical Data
Preliminary
113
6.8 Stop and Wait Mode Disable Function
Figure 6-16 Internal Stop Disable Circuit
The 56800E core contains both STOP and WAIT instructions. Both put the CPU to sleep. For
lowest power consumption in Stop mode, the PLL can be shut down. This must be done explicitly
before entering Stop mode, since there is no automatic mechanism for this. When the PLL is shut
down, the 56800E system clock must be set equal to the prescaler output.
Some applications require the 56800E STOP and WAIT instructions be disabled. To disable those
instructions, write to the SIM control register (SIM_CONTROL), described in
Section 6.5.1
. This
procedure can be on either a permanent or temporary basis. Permanently assigned applications last
only until their next reset.
6.9 Resets
The SIM supports four sources of reset. The two asynchronous sources are the external RESET pin
and the Power-On Reset (POR). The two synchronous sources are the software reset, which is
generated within the SIM itself by writing to the SIM_CONTROL register and the COP reset.
Reset begins with the assertion of any of the reset sources. Release of reset to various blocks is
sequenced to permit proper operation of the device. A POR reset is first extended for 2
21
clock
cycles to permit stabilization of the clock source, followed by a 32 clock window in which SIM
clocking is initiated. It is then followed by a 32 clock window in which peripherals are released to
implement Flash security, and, finally, followed by a 32 clock window in which the core is
initialized. After completion of the described reset sequence, application code will begin
execution.
Resets may be asserted asynchronously, but are always released internally on a rising edge of the
system clock.
D-FLOP
D
Q
C
D-FLOP
D
Q
C
R
56800E
STOP_DIS
Permanent
Disable
Reprogrammable Disable
Clock
Select
RESET
Note: Wait disable circuit is similar
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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PDF描述
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MC56F8357 16-BIT HYBRID CONTROLLERS
MC56F8357MPY60 16-bit Digital Signal Processor
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MC56F8356MFVE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8356VFV60 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8356VFVE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8357 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-BIT HYBRID CONTROLLERS
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