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參數(shù)資料
| 型號： | MC68150FN33 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 12/40頁 |
| 文件大?。?/td> | 631K |
| 代理商： | MC68150FN33 |
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MC68150
2
MOTOROLA
High Performance Frequency
Control Products — BR1334
PIN DESCRIPTIONS
Pin
I/O
Description
BCLK
I
Bus clock — the main system clock (from MC88916)
D31–D0
I/O
Data bits on the 32-bit ‘040 bus
PD31–PD16
I/O
Peripheral data — data bits on the 8/16/32-bit peripheral side; PD15–PD0 do not exist for a 32-bit access, these
require two F245 transceivers
PA1, PA0
O
Peripheral address — address bits indicating the byte being accessed on the peripheral side (00 = MSB, 11 = LSB)
UWE, LWE
O
Upper (PD31–PD24), lower (PD23–PD16) write enables on the peripheral side significant for 16-bit ports (WRITE)
SWE
O
Single write enable on the peripheral-bit side for 8-bit ports (WRITE)
DS
O
Data strobe indicates data can be put on the peripheral bus to be read by the ‘040 (READ) or is valid to be written
on the peripheral bus (WRITE)
DSACK1,
DSACK0
I
Data transfer acknowledge. HH inserts wait states in the current bus cycle. HL indicates the peripheral bus size
is 8-bits. LH indicates peripheral bus size is 16-bits. LL indicates the peripheral bus is 32-bits. Recognition of these
signals is what allows for “dynamic” bus sizing
SIZ1, SIZ0
I
Indicates the size of the MPU bus access. HH or LL = 32-bits (long word); HL = 16-bits (word); LH = 8-bits (byte)
A1, A0
I
‘040 Address bits, Indicates the byte offset of the ‘040 access (which byte is accessed: HH = D7-D0; HL = D15-D8;
LH = D23-D16; LL = D31-D24)
CS
I
Chip select, tells the 68150 that a transfer is starting or ending
TA
O
Transfer acknowledge indicates the 68150 has completed the transfer
R/W
I
READ/WRITE, tells the 68150 if it is a read or write transfer
Figure 1. Pinout: 68-Lead PLCC (Top View)
BCLK
TA
CS
R/W
D7 D6 D5 D4 D3 D2 D1 D0 GND PD31 PD30 PD29 PD28 PD27 PD26 PD25 PD24
D24 D25 D26 D27 D28 D29 D30 D31 GND A1 A0 SIZ1 SIZ0
D8
D9
D10
D11
D12
D13
D14
D15
VCC
D16
D17
D18
D19
D20
D21
D22
D23
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
PD23
PD22
PD21
PD20
PD19
PD18
PD17
PD16
VCC
PA1
PA0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
UWE
LWE
SWE
DSACK1
DSACK0
DS
MC68150
F
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I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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MC68150
32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer
NETCOM
IDT 32-Bit to 32/16/8-Bit Dynamic READ/WRITE Bus Sizer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC68150
2
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| MC68150FN33 | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC68 |
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| MC68230G10 | 24 I/O, PIA-GENERAL PURPOSE, PDIP48 |
| MC68230G8 | 24 I/O, PIA-GENERAL PURPOSE, PDIP48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68150FN33R2 | 制造商:Integrated Device Technology Inc 功能描述:Read/Write Bus Sizer 68-Pin PLCC T/R |
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| MC68153 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:BUS INTERRUPTER MODULE |
| MC68160 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:ENHANCED ETHERNET INTERFACE TRANSCEIVER |
| MC68160A | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:ENHANCED ETHERNET INTERFACE TRANSCEIVER |
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