參數(shù)資料
型號(hào)： MC68160FB
廠商： MOTOROLA INC
元件分類(lèi)： 網(wǎng)絡(luò)接口
英文描述： ENHANCED ETHERNET INTERFACE TRANSCEIVER
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP52
封裝： PLASTIC, TQFP-52
文件頁(yè)數(shù)： 4/30頁(yè)
文件大?。?/td> 372K
代理商： MC68160FB
MC68160 MC68160B MC68160C
Table 1. Pin Function Descriptiont
4
MOTOROLA ANALOG IC DEVICE DATA
Pin(s)
Symbol
Type
Name/Function
CONTROLLER INTERFACE
1
RENA
O
TTL/CMO
Receive Enable Output:
Indication of the presence of network activity, synchronous to
RCLK. In the standby mode, RENA is driven to the high impedance state.
2
RX
O
TTL/CMOS
Receive Data Output:
Recovered data, synchronous to RCLK. Following a reset operation,
100 ms should be allowed before attempting to read data processed by the MC68160, B and
C. This delay is needed to insure that the receive phase locked loop is properly synchronized
with incoming data. In the standby mode, RX is driven to the high impedance state.
48
TCLK
O
TTL/CMOS
Transmit Clock Output CMOS/TTL Output:
TCLK provides a symmetrical clock signal at
10 MHz for reference timing of data to be encoded. In the standby mode, TCLK is driven to
the high impedance state.
49
TENA
I
TTL
Transmit Enable Input:
Input signal synchronous to TCLK which enables data transmission
on the active port. An internal pull–down resistor is provided so that the input is low under no
connect conditions. (This resistor is removed in the standby mode). If TENA is asserted at
the conclusion of a reset operation, it must first be deasserted and then reasserted before
data transmission can occur. In the standby mode, TENA is driven to the high impedance
state.
50
RCLK
O
TTL/CMOS
Receive Clock Output:
Recovered clock. In the standby mode, RCLK is driven to the high
impedance state.
51
CLSN
O
TTL/CMOS
Collision Output:
In the AUI mode, indicates the presence of signals at the ACX+ and
ACX– terminals which meet threshold and pulse width requirements. In the TP mode,
indicates simultaneous transmit and receive activity, a heartbeat (SQE Test) signal was
generated, or the jabber timer has expired. In the standby mode, CLSN is driven to the high
impedance state.
52
TX
I
TTL
Transmit Data Input:
Input signal synchronous to TCLK which provides NRZ serial data to
be Manchester encoded. In the standby mode, TX is driven to the high impedance state.
AUI INTERFACE
21
22
ACX–
ACX+
I
AUI Differential Collision Inputs:
These inputs are connected to a pair of internally biased
line receivers consisting of a carrier detect receiver with offset threshold and noise filtering to
detect the line activity. Signals at ACX+/– have no effect on data path functions.
23
24
ARX–
ARX+
I
AUI Differential Receiver Inputs:
These inputs are connected to a pair of internally biased
line receivers consisting of a carrier detect receiver with offset threshold and noise filtering to
detect the line activity, and a data receiver with no offset for Manchester Data reception.
25
26
ATX–
ATX+
O
AUI Differential Transmit Outputs :
This line pair is intended to operate into terminated
transmission lines. For TX signals meeting setup and hold time to TCLK when TENA is
previously asserted, Manchester encoded data is outputted at ATX+/–. When operating into a
78
terminated transmission line, signaling meets the required output levels and skew for
IEEE–802.3 drop cables. When the 10BASE–T port is automatically or manually selected,
the AUI outputs are driven to a low power standby state in which the outputs deliver a
balanced high state voltage.
TWISTED PAIR INTERFACE
31
32
TPRX–
TPRX+
I
Twisted Pair Differential Receiver Inputs:
These inputs are connected to a receiver with
Smart Squelch capability which only allows differential receive data to pass as long as the
input amplitude is greater than a minimum signal threshold level and a specific pulse
sequence is received. This assures a good signal to noise ratio while the signal pair is active
by preventing crosstalk and impulse noise conditions from activating the receive function.
36
37
TPTX–
TPTX+
O
Twisted Pair Differential Transmitter Outputs:
These lines have pre–distortion drive
capability and are intended to drive terminated twisted pair transmission lines. When the AUI
port is manually selected, the 10BASE–T outputs are driven to a low power standby state in
which the outputs deliver a balanced high state voltage. However, when the AUI port is
automatically selected, the 10BASE–T outputs remain active.
NOTE
:
The sense of the controller interface pins will change, depending on the controller selected.
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