參數(shù)資料
型號(hào): MC68332GVPV25
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 25 MHz, MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁數(shù): 66/111頁
文件大?。?/td> 650K
代理商: MC68332GVPV25
MOTOROLA
MC68332
58
MC68332TS/D
5.4 Parameter RAM
Parameter RAM occupies 256 bytes at the top of the TPU module address map. Channel parameters
are organized as 128 16-bit words. However, only 100 words are actually implemented. The parameter
RAM address map shows how parameter words are organized in memory.
—= Not Implemented
Y = M111, where M represents the logic state of the MM bit in the SIMCR.
5.5 TPU Registers
The TPU memory map contains three groups of registers:
System Configuration Registers
Channel Control and Status Registers
Development Support and Test Verification Registers
5.5.1 System Configuration Registers
STOP — Stop Bit
0 = TPU operating normally
1 = Internal clocks shut down
Table 23 TPU Parameter RAM Address Map
Channel
Base
Parameter Address
Number
Address
01234567
0
$YFFFF##
00
02
04
06
08
0A
1
$YFFFF##
10
12
14
16
18
1A
2
$YFFFF##
20
22
24
26
28
2A
3
$YFFFF##
30
32
34
36
38
3A
4
$YFFFF##
40
42
44
46
48
4A
5
$YFFFF##
50
52
54
56
58
5A
6
$YFFFF##
60
62
64
66
68
6A
7
$YFFFF##
70
72
74
76
78
7A
8
$YFFFF##
80
82
84
86
88
8A
9
$YFFFF##
90
92
94
96
98
9A
10
$YFFFF##
A0
A2
A4
A6
A8
AA
11
$YFFFF##
B0
B2
B4
B6
B8
BA
12
$YFFFF##
C0
C2
C4
C6
C8
CA
13
$YFFFF##
D0
D2
D4
D6
D8
DA
14
$YFFFF##
E0
E2
E4
E6
E8
EA
EC
EE
15
$YFFFF##
F0
F2
F4
F6
F8
FA
FC
FE
TPUMCR — TPU Module Configuration Register
$YFFE00
15
14
13
12
11
10
9
8
7
6
5
4
3
0
STOP
TCR1P
TCR2P
EMU
T2CG
STF
SUPV
PSCK
0
IARB
RESET:
0
1
0
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