參數(shù)資料
型號: MC68334GMFC16
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁數(shù): 21/76頁
文件大?。?/td> 444K
代理商: MC68334GMFC16
MOTOROLA
MC68334
28
MC68334TS/D REV. 1
3.5 Chip Selects
Typical microcontrollers require additional hardware to provide external chip-select and address de-
code signals. The MCU includes 12 programmable chip-select circuits that can provide 2- to 20-clock-
cycle access to external memory and peripherals. Address block sizes of two Kbytes to one Mbyte can
be selected. The figure below is a functional diagram of a chip-select circuit.
Chip-select assertion can be synchronized with bus control signals to provide output enable, read/write
strobe, or interrupt acknowledge signals. Chip select logic can also generate DSACK and AVEC signals
internally. Each signal can also be synchronized with the ECLK signal available on ADDR23.
Figure 10 Chip-Select Circuit Block Diagram
When a memory access occurs, chip-select logic compares address space type, address, type of ac-
cess, transfer size, and interrupt priority (in the case of interrupt acknowledge) to parameters stored in
chip-select registers. If all parameters match, the appropriate chip-select signal is asserted. Select sig-
nals are active low. If a chip-select function is given the same address as a microcontroller module or
an internal memory array, an access to that address goes to the module or array, and the chip-select
signal is not asserted. The external address and data buses do not reflect the internal access.
All chip-select circuits are configured for operation out of reset. However, all chip-select signals except
CSBOOT are disabled, and cannot be asserted until the BYTE field in the corresponding option register
is programmed to a nonzero value, selecting a transfer size. The chip-select option register must not be
written until a base address has been written to a proper base address register. CSBOOT is automati-
cally asserted out of reset. Alternate functions for chip-select pins are enabled if appropriate data bus
pins are held low at the release of the reset signal.
The following table lists allocation of chip-selects and discrete outputs on the pins of the MCU.
CHIP SEL BLOCK
AVEC
GENERATOR
DSACK
GENERATOR
PIN
ASSIGNMENT
REGISTER
PIN
DATA
REGISTER
BASE ADDRESS REGISTER
TIMING
AND
CONTROL
ADDRESS COMPARATOR
OPTION COMPARE
OPTION REGISTER
AVEC
DSACK
PIN
BUS CONTROL
INTERNAL
SIGNALS
ADDRESS
相關(guān)PDF資料
PDF描述
MC68334GVFC16 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132
MC68334GVFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334GCFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334MFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334VFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
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