MOTOROLA
M68040 USER’S MANUAL
vii
TABLE OF CONTENTS (Continued)
Paragraph
Number
Page
Number
Title
Section 3
Memory Management Unit
(Except MC68EC040 and MC68EC040V)
Memory Management Programming Model..........................................
User and Supervisor Root Pointer Registers.....................................
Translation Control Register..............................................................
Transparent Translation Registers ....................................................
MMU Status Register ........................................................................
Logical Address Translation..................................................................
Translation Tables .............................................................................
Descriptors ........................................................................................
Table Descriptors ...........................................................................
Page Descriptors ...........................................................................
Descriptor Field Definitions ............................................................
Translation Table Example................................................................
Variations in Translation Table Structure ..........................................
Indirect Action ................................................................................
Table Sharing Between Tasks.......................................................
Table Paging..................................................................................
Dynamically Allocated Tables ........................................................
Table Search Accesses.....................................................................
Address Translation Protection .........................................................
Supervisor and User Translation Tables........................................
Supervisor Only..............................................................................
Write Protect ..................................................................................
Address Translation Caches .................................................................
Transparent Translation ........................................................................
Address Translation Summary..............................................................
MMU Effect on
RSTI
and
MDIS
.............................................................
Effect of
RSTI
on the MMUs ..............................................................
Effect of
MDIS
on Address Translation..............................................
MMU Instructions ..................................................................................
MOVEC .............................................................................................
PFLUSH.............................................................................................
PTEST ...............................................................................................
Register Programming Considerations..............................................
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.2
3.2.1
3.2.2
3.2.2.1
3.2.2.2
3.2.2.3
3.2.3
3.2.4
3.2.4.1
3.2.4.2
3.2.4.3
3.2.4.4
3.2.5
3.2.6
3.2.6.1
3.2.6.2
3.2.6.3
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.7
3.7.1
3.7.2
3.7.3
3.7.4
3-3
3-3
3-4
3-5
3-6
3-7
3-7
3-12
3-12
3-13
3-13
3-16
3-16
3-16
3-18
3-19
3-21
3-21
3-23
3-23
3-23
3-24
3-26
3-29
3-30
3-31
3-31
3-31
3-33
3-33
3-33
3-33
3-34