MOTOROLA
E-16
MC68HC05B6
Rev. 4
MC68HC705B16
14
E.4.3
EEPROM/EPROM/RAM serial bootstrap
For erased EPROM verication, PD4 must be at ‘0’. In this case, erased EPROM verication
executes as described in
Section E.4.1 before control is given to the serial routine.
If PD4 is at ‘1’, the program initially checks the state of the security bit. If the security bit is active
(‘0’), the program will not enter serial bootstrap and the red LED will ash. Otherwise the serial
The serial routine communicates through the SCI with an external host, typically a PC, by means
of an RS232 link at 9600 baud, 8-bit, no parity and full duplex. Refer to
Figure E-8 for a schematic
diagram of a suitable circuit.
Note:
Data format is not ASCII, but 8-bit binary, so a complementary program must be run by
the host to supply the required format. Such a program is available for the IBM PC from
Motorola.
The EPROM bootstrap routines are used to customise the OTP EPROM. To increase the speed
of programming the 15 kbytes, four bytes are programmed while the data is simultaneously
transmitted back and forward in full duplex. This implies that while 4 bytes are being programmed
the next 4 bytes are received and the preceding 4 bytes are echoed. The format accepted by the
serial loader is as follows:
1) EPROM locations
[address n high] [address n low] [data(n)] [data (n+1)] [data (n+2)] [data (n+3)]
Address n must have the two least signicant bits at zero so that n, n+1, n+2 and n+3
have identical most signicant bits. These blocks of four bytes do not need to be
contiguous, as a new address is transmitted for each new group.
2) EEPROM1 locations
[address n high] [address n low] [data(n)] [dummy data 1] [dummy data 2] [dummy data 3]
The same four byte protocol of data exchange is used, but only the rst data value is
programmed at address n. The three following dummy data values must be sent to be
in agreement with the protocol, but are not signicant.
The protocol is as follows:
1) The MC68HC705B16 sends the last two bytes programmed to the host as a
prompt; this also allows the host to verify that programming has been carried
out correctly.
2) In response to the rst byte prompt, the host sends the rst address byte.
3) After receiving the rst address byte, the MC68HC705B16 sends the next
byte programmed.
TPG
200
05B6Book Page 16 Tuesday, April 6, 1999 8:24 am