參數(shù)資料
型號： MC68HC05C12ACFN
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 138/156頁
文件大小： 756K
代理商： MC68HC05C12ACFN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Serial Peripiheral Interface (SPI)
General Release Specification
MC68HC05C12A — Rev. 3.0
82
Serial Peripiheral Interface (SPI)
MOTOROLA
10.3 Features
Full Duplex, 4-Wire Synchronous Transfers
Master or Slave Operation
Bus Frequency Divided by 2 (Maximum) Master Bit Frequency
Bus Frequency (Maximum) Slave Bit Frequency
Four Programmable Master Bit Rates
Programmable Clock Polarity and Phase
End of Transmission Interrupt Flag
Write Collision Flag Protection
Master-Master Mode Fault Protection Capability
10.4 SPI Signal Description
The four basic signals (MOSI, MISO, SCK, and SS) are described in the
following paragraphs. Each signal function is described for both the
master and slave mode.
10.4.1 Master In Slave Out (MISO)
The MISO line is configured as an input in a master device and as an
output in a slave device. It is one of the two lines that transfer serial data
in one direction, with the most significant bit sent first. The MISO line of
a slave device is placed in the high-impedance state if the slave is not
selected.
10.4.2 Master Out Slave In (MOSI)
The MOSI line is configured as an output in a master device and as an
input in a slave device. It is one of the two lines that transfer serial data
in one direction with the most significant bit sent first.
相關(guān)PDF資料
PDF描述
MC68HSC05C12AFN 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44
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MC68HCL05C12AFB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
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