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參數(shù)資料
| 型號： | MC68HC05C8APE |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 67/116頁 |
| 文件大?。?/td> | 781K |
| 代理商： | MC68HC05C8APE |
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Serial Communications Interface (SCI)
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
54
Freescale Semiconductor
9.5.3 SCI Control Register 2
SCI control register 2 has these functions:
Enables the SCI receiver and SCI receiver interrupts
Enables the SCI transmitter and SCI transmitter interrupts
Enables SCI receiver idle interrupts
Enables SCI transmission complete interrupts
Enables SCI wakeup
Transmits SCI break characters
TIE — Transmit Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TDRE bit becomes set. Reset clears the
TIE bit.
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
TCIE — Transmission Complete Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TC bit becomes set. Reset clears the TCIE
bit
1 = TC interrupt requests enabled
0 = TC interrupt requests disabled
RIE — Receive Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the RDRF bit or the OR bit becomes set. Reset
clears the RIE bit.
1 = RDRF interrupt requests enabled
0 = RDRF interrupt requests disabled
ILIE — Idle Line Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the IDLE bit becomes set. Reset clears the
ILIE bit.
1 = IDLE interrupt requests enabled
0 = IDLE interrupt requests disabled
TE — Transmit Enable Bit
Setting this read/write bit begins the transmission by sending a preamble of 10 or 11 logic 1s from the
transmit shift register to the PD1/TDO pin. Reset clears the TE bit.
1 = Transmission enabled
0 = Transmission disabled
Address: $000F
Bit 7
654321
Bit 0
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset:
00000000
Figure 9-6. SCI Control Register 2 (SCCR2)
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相關(guān)代理商/技術(shù)參數(shù) |
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