參數(shù)資料
型號: MC68HC05C9A
廠商: Motorola, Inc.
元件分類: 8位微控制器
英文描述: 8-Bit Microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件頁數(shù): 38/160頁
文件大小: 783K
代理商: MC68HC05C9A
L
G
R
Interrupts
General Release Specification
MC68HC05C9A
Rev. 4.0
38
Interrupts
MOTOROLA
When the current instruction is complete, the processor checks all
pending hardware interrupts. If interrupts are not masked (CCR I bit
clear) and if the corresponding interrupt enable bit is set, the processor
proceeds with interrupt processing; otherwise, the next instruction is
fetched and executed.
If an external interrupt and a timer, SCI, or SPI interrupt are pending at
the end of an instruction execution, the external interrupt is serviced first.
The SWI is executed the same as any other instruction, regardless of the
I-bit state.
Table 4-1
shows the relative priority of all the possible interrupt sources.
Figure 4-1
shows the interrupt processing flow.
Table 4-1. Vector Addresses for Interrupts and Resets
Function
Source
Local
Mask
Global
Mask
Priority
(1 = Highest)
Vector
Address
Reset
Power-On-Reset
RESET Pin
COP Watchdog
None
None
1
$3FFE–$3FFF
Software
Interrupt
(SWI)
External
Interrupt
User Code
None
None
Same Priority
As Instruction
$3FFC–$3FFD
IRQ Pin
Port B Pins
ICF Bit
OCF Bit
TOF Bit
TDRE Bit
TC Bit
RDRF Bit
OR BIt
IDLE Bit
SPIF Bit
MODF Bit
None
I Bit
2
$3FFA–$3FFB
Timer
Interrupts
ICIE Bit
OCIE Bit
TOIE Bit
I Bit
3
$3FF8–$3FF9
SCI
Interrupts
TCIE Bit
I Bit
4
$3FF6–$3FF7
RIE Bit
ILIE Bit
SPI
Interrupts
SPIE
I Bit
5
$3FF4–$3FF5
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