參數(shù)資料
型號(hào): MC68HC05C9AMP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 38/124頁(yè)
文件大小: 774K
代理商: MC68HC05C9AMP
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General Description
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
20
Freescale Semiconductor
RESET pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to
Chapter 5 Resets for more detail.
1.5.5 TCAP
This pin controls the input capture feature for the on-chip programmable timer. The TCAP pin contains an
internal Schmitt trigger as part of its input to improve noise immunity. Refer to Chapter 8
Capture/Compare Timer for more detail.
1.5.6 TCMP
The TCMP pin provides an output for the output compare feature of the on-chip programmable timer.
Refer to Chapter 8 Capture/Compare Timer for more detail.
1.5.7 PA0–PA7
These eight I/O lines comprise port A. The state of each pin is software programmable and all port A pins
are configured as inputs during reset. Refer to Chapter 7 Input/Output Ports for more detail.
1.5.8 PB0–PB7
These eight I/O lines comprise port B. The state of each pin is software programmable and all port B pins
are configured as inputs during reset. Port B has mask option register enabled pullup devices and
interrupt capability selectable for any pin. Refer to Chapter 7 Input/Output Ports for more detail.
1.5.9 PC0–PC7
These eight I/O lines comprise port C. The state of each pin is software programmable and all port C pins
are configured as inputs during reset. PC7 has high current sink and source capability. Refer to Chapter
7 Input/Output Ports for more detail.
1.5.10 PD0–PD5 and PD7
These seven I/O lines comprise port D. The state of each pin is software programmable and all port D
pins are configured as inputs during reset. Refer to Chapter 7 Input/Output Ports for more detail.
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