參數(shù)資料
型號(hào): MC68HC05E6VDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 78/140頁
文件大?。?/td> 1141K
代理商: MC68HC05E6VDWR2
Input/Output Ports
MC68HC05E6 — Rev. 1.0
42
Input/Output Ports
MOTOROLA
The A/D converter is enabled by setting the ADON bit in the A/D
status/control (ADSTAT) register.
ADON — A/D converter enable/disable
1 = A/D converter is enabled.
0 = A/D converter is disabled.
The shaded bits in the ADSTAT register are described fully in A/D
NOTE:
Performing a digital read of port G with levels other than VDD or VSS on
the pins will result in greater power dissipation during the read cycles.
Port registers
The following sections explain in detail the individual bits in the data and
control registers associated with the ports.
Port data registers
(PORTA, PORTB,
PORTC and PORTD)
For all port registers, each bit can be configured as input or output via
the corresponding data direction bit in the port data direction register
(DDRx).
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
A/D status/control (ADSTAT)
$0011 COCO ADRC ADON
0
CH2
CH1
CH0 0u00 0uuu
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port A data (PORTA)
$0000
Undened
Port B data (PORTB)
$0001
Undened
Port C data (PORTC)
$0002
Undened
Port D data (PORTD)
$0003
Undened
8-ports
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