- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45221 > MC68HC05K3CDWR2 (MOTOROLA INC) 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC05K3CDWR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 115/132頁 |
| 文件大?。?/td> | 1188K |
| 代理商： | MC68HC05K3CDWR2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁當(dāng)前第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁
Personality EEPROM (PEEPROM)
PEEPROM Registers
MC68HC05K3 — Revision 4.0
Technical Data
MOTOROLA
Personality EEPROM (PEEPROM)
83
Table 9-1. Software to Read PEEPROM
pebsr
equ
$000e
pescr
equ
$000f
ram
equ
$000c
lda
#$xy
; xy is base addresses and should start on
sta
pebsr
; a first column (i.e., $00, $08, $10, $18, etc).
clr
ram
; clear ram location used for final result
peep_rd
rol
pescr
; c = pedata (c = carry bit)
ror
ram
; ram = c
inc
pebsr
; go to next bit in array.
brclr
0,pescr,peep_rd
; care data here, loop until all bytes read
; peep_rd loop ends when PEPCZF = 1.
; At end of loop, ram contains one row of PEEP data.
CPCLK — Charge Pump Clock Source Bit
The CPCLK bit is a read/write bit that controls the source of the clock
for the charge pump. When the CPCLK bit is set, the charge pump is
driven by the PH2 bus clock. When the CPCLK bit is cleared, the
charge pump is driven from an internal ring oscillator. The CPCLK bit
is cleared when the device is in reset.
In systems where the desired PH2 clock rate is below 1 MHz, the
CPCLK bit should be cleared to enable the internal ring oscillator.
Otherwise, the charge pump does not attain sufficient program/erase
voltage because the clock source is too slow.
CPEN — Charge Pump Enable Bit
The CPEN bit is a read/write bit to control the on-chip charge pump
for programming and erasure of the personality EEPROM. This
charge pump is only intended for use at VDD supply voltages
greater than or equal to 2.7 Vdc. The charge pump is activated
when both the CPEN bit is set and one of the program or erase bits is
also set (PEPGM, PEBYTE, or PBULK). The charge pump supplies
the required programming voltage to the personality EEPROM array.
Once activated, and after startup time tCP, the charge pump continues
to operate until all the program and erase bits are cleared.
NOTE:
If the personality EEPROM is read while the CPEN bit is set, the data is
unknown.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05K3DWR2 | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16 |
| MC68HC05L25PB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52 |
| MC68HC05L2CB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
| MC68HC705L2K | 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP42 |
| MC68HC05L6FN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05K3CP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05K3CSD | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05K3DW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05K3P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05L10 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcomputer Unit |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。