參數(shù)資料
型號: MC68HC05K3CDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16
封裝: SOIC-16
文件頁數(shù): 62/132頁
文件大?。?/td> 1188K
代理商: MC68HC05K3CDWR2
MC68HC05K3 — Revision 4.0
Technical Data
MOTOROLA
Central Processor Unit (CPU) Core
35
Technical Data — MC68HC05K3
Section 3. Central Processor Unit (CPU) Core
3.1 Contents
3.2 Introduction
The MC68HC05K3 has a 1024-byte memory map. Therefore, it uses
only the lower 10 bits of the address bus. In the following discussion, the
upper six bits of the address bus can be ignored. Also, by using a mask
option, the STOP instruction can be converted from acting as the normal
STOP instruction. The stack area also is reduced to 32 bytes due to the
limited amount of RAM. Therefore, the stack pointer is reduced to only
five bits, only decrements down to $00E0, and then wraps around to
$00FF. All other instructions and registers behave as described in
M6805 HMOS/M146805 CMOS Family User’s Manual, Motorola
document order number M6805UM/AD3.
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