參數(shù)資料
型號: MC68HC05P18AMP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 74/130頁
文件大?。?/td> 1310K
代理商: MC68HC05P18AMP
NON-DISCLOSURE
AGREEMENT
REQUIRED
Resets
Technical Data
MC68HC05P18A
Resets
5.4.3 Low-Voltage Reset (LVR)
The internal LVR reset is generated when the supply voltage to the VDD
pin falls below a nominal 3.80 Vdc. The LVR threshold is not intended to
be an accurate and stable trip point, but is intended to assure that the
CPU is held in reset when the VDD supply voltage is below reasonable
operating limits. If the LVR is tripped for a short time, the LVR reset
signal will last at least two cycles of the CPU bus clock, PH2. A mask
option is provided to disable the LVR.
The LVR generates the RST signal, which resets the CPU and other
peripherals. If any other reset function is active at the end of the LVR
reset signal, the RST signal remains in the reset condition until the other
reset condition(s) end.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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