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參數(shù)資料
| 型號(hào)： | MC68HC05SR3CP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 73/96頁 |
| 文件大小： | 612K |
| 代理商： | MC68HC05SR3CP |
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MC68HC05SR3
MOTOROLA
10-3
OPERATING MODES
10
10.3
Bootstrap Mode
The Bootstrap mode is provided in the EPROM part (MC68HC705SR3) as a mean of
self-programming its EPROM with minimal circuitry. Bootstrap mode will be entered on the rising
edge of RESET when the VPP pin is at VTST (2×VDD) and PB1 pin is at VDD. Once in the bootstrap
mode, PB1 can then be used for other purposes. After entering the bootstrap mode, CPU
branches to the bootstrap program and carries out the EPROM programming routine. The user
EPROM consists of 3840 bytes, from location $1000 to $1EFF.
Refer to Appendix A for further details on MC68HC705SR3.
Table 10-2 Self-Check Report
D4
D3
D2
D1
REMARKS
Flashing
O.K. (self-check is on-going)
1
Bad port A
1
0
Bad port B
1
0
1
Bad port C
1
0
Bad port D
1
0
1
Bad RAM
1
0
1
0
Bad ROM
1
0
Bad SWI
0
1
Bad IRQ
1=LED on, 0=LED off
TPG
73
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