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參數(shù)資料
| 型號(hào)： | MC68HC05SU3AP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 42/80頁(yè) |
| 文件大?。?/td> | 328K |
| 代理商： | MC68HC05SU3AP |
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MC68HC05SU3A
MOTOROLA
7-1
CPU CORE AND INSTRUCTION SET
7
CPU CORE AND INSTRUCTION SET
This section provides a description of the CPU core registers, the instruction set and the
addressing modes of the MC68HC05SU3A.
7.1
Registers
The MCU contains ve registers, as shown in the programming model of Figure 7-1. The interrupt
stacking order is shown in Figure 7-2.
7.1.1
Accumulator (A)
The accumulator is a general purpose 8-bit register used to hold operands and results of
arithmetic calculations or data manipulations.
Figure 7-1 Programming model
Accumulator
Index register
Program counter
Stack pointer
Condition code register
Carry / borrow
Zero
Negative
Interrupt mask
Half carry
70
15
7
0
15
7
0
0 0 0 0 0 0 0 1 1
70
1 1 1 H I N Z C
TPG
45
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