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| 型號(hào)： | MC68HC05T7B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | SDIP-56 |
| 文件頁數(shù)： | 81/109頁 |
| 文件大小： | 9008K |
| 代理商： | MC68HC05T7B |
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Resets and Interrupts
Interrupts
MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 3.0
Technical Data
MOTOROLA
Resets and Interrupts
71
5.4.3 Timer Interrupts
The timer can generate the following interrupt requests:
Real time
Timer overflow
Setting the I bit in the condition code register disables timer interrupts.
5.4.3.1 Real-Time Interrupt
A real-time interrupt occurs if the real-time interrupt flag, RTIF, becomes
set while the real-time interrupt enable bit, RTIE, is also set. RTIF and
RTIE are in the timer status and control register.
5.4.3.2 Timer Overflow Interrupt
A timer overflow interrupt request occurs if the timer overflow flag, TOF,
becomes set while the timer overflow interrupt enable bit, TOIE, is also
set. TOF and TOIE are in the timer status and control register.
5.4.4 Interrupt Processing
The CPU takes the following actions to begin servicing an interrupt:
Stores the CPU registers on the stack in the order shown in
Sets the I bit in the condition code register to prevent further
interrupts
Loads the program counter with the contents of the appropriate
interrupt vector locations:
–
$07FC and $07FD (software interrupt vector)
–
$07FA and $07FB (external interrupt vector)
–
$07F8 and $07F9 (timer interrupt vector)
The return-from-interrupt (RTI) instruction causes the CPU to recover
the CPU registers from the stack as shown in Figure 5-6.
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