MC68HC05X16
Rev. 1
MOTOROLA
v
INDEX
INDEX
In this index numeric entries are placed first; page references in italicsindicate that the reference
is to a figure.
64-pin QFP mechanical drawing
13-2
64-pin QFP pinout
13-1
A
A – accumulator
11-1
A/D converter
ADSTAT
4-5
block diagram
9-2
clock selection
9-4
AC7-AC0 bits in CACC
5-13
ADDATA – A/D result data register
9-3
addressing modes
11-11
11-13
ADON bit in ADSTAT
4-5
,
9-5
ADRC bit in ADSTAT
9-4
ADSTAT – A/D status/control register
4-5
,
9-4
ADON – A/D converter on bit
4-5
,
9-5
ADRC – A/D RC oscillator control bit
9-4
CH3-CH0 – A/D channel selection bits
9-5
COCO – continuous conversion bit
9-4
alternate counter register
6-3
AM0-AM7 bits in CACM
5-14
AT bit in CCOM
5-9
B
BAUD – baud rate register
7-18
SCP1, SCP0 – serial prescaler select bits
7-18
SCR2, SCR1, SCR0 – SCI rate select bits
7-19
SCT2, SCT1, SCT0 – SCI rate select bits
7-18
baud rate selection
7-20
biphase mode
5-18
bit set/clear addressing mode
11-13
bit test and branch addressing mode
11-13
bit time calculation
5-17
block diagrams
A/D converter
9-2
COP watchdog system
10-4
MC68HC05X16
1-4
MC68HC05X32
A-2
MC68HC705X32
B-3
MCAN module
5-1
PLM system
8-1
programmable timer
6-2
SCI
7-2
slow mode divider
2-10
BRP5-BRP0 bits in CBT0
5-15
BS bit in CSTAT
5-10
C
CACC – MCAN acceptance code register
5-13
AC7-AC0 – acceptance code bits
5-13
CACM – MCAN acceptance mask register
5-14
AM0-AM7 – acceptance mask bits
5-14
CAF bit in EEPROM control
B-8
CAN – see MCAN
CANE
B-2
C-bit in CCR
11-3
CBT0 – MCAN bus timing register 0
5-14
BRP5-BRP0 – baud rate prescalar bits
5-15
SJW1, SJW0 – synchronization jump width bits
5-14
CBT1 – MCAN bus timing register 1
5-16
SAMP – sampling bit
5-16
TSEG22-TSEG10 – time segment bits
5-16
CCNTRL – MCAN control register
5-6
EIE – error interrupt enable bit
5-6
MODE – undefined mode bit
5-6
OIE – overrun interrupt enable bit
5-6
RIE – receive interrupt enable bit
5-7
RR – reset request bit
5-7
SPD – speed mode bit
5-6
TIE – transmit interrupt enable bit
5-6
CCOM – MCAN command register
5-7
AT – abort transmission bit
5-9
COMPSEL – comparator selector bit
5-8
COS – clear overrun status bit
5-9
RRB – release receive buffer bit
5-9
RX0, RX1 – receive pin bits
5-8
SLEEP – go to sleep bit
5-8
TR – transmission request bit
5-9
CCR – condition code register
11-2
ceramic resonator
2-13
CH3-CH0 bits in ADSTAT
9-5