參數(shù)資料
型號(hào): MC68HC11A0CFN2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 31/158頁
文件大小: 3803K
代理商: MC68HC11A0CFN2
ELECTRICAL CHARACTERISTICS
MC68HC11A8
A-6
TECHNICAL DATA
A
NOTES:
1. RESET is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four
clock cycles, releases the pin, and samples the pin level two cycles later to determine the source of the interrupt.
Refer to 9 RESETS, INTERRUPTS, AND LOW POWER MODES for further detail.
2. All timing is shown with respect to 20% VDD and 70% VDD, unless otherwise noted.
Table A-4a Control Timing (MC68L11A8)
VDD = 3.0 Vdc to 5.5 Vdc, VSS = 0 Vdc, TA = TL to TH
Characteristic
Symbol
1.0 MHz
2.0 MHz
Unit
Min
Max
Min
Max
Frequency of Operation
fo
dc
1.0
dc
2.0
MHz
E-Clock Period
tcyc
1000
500
ns
Crystal Frequency
fXTAL
4.0
8.0
MHz
External Oscillator Frequency
4 fo
dc
4.0
dc
8.0
MHz
Processor Control Setup
tPCSU = 1/4 tcyc + 50 ns
Time
tPCSU
325
200
ns
Reset Input Pulse Width
(To Guarantee External
(Note 1)
Reset Vector)
(Minimum Input Time;
Can Be Preempted by
Internal Reset)
PWRSTL
8
1
8
1
tcyc
Mode Programming Setup Time
tMPS
2—2—
tcyc
Mode Programming Hold Time
tMPH
10—10—
ns
Interrupt Pulse Width,
PWIRQ = tcyc + 20 ns
IRQ Edge-Sensitive Mode
PWIRQ
1020
520
ns
Wait Recovery Start-up Time
tWRS
—4—4
tcyc
Timer Pulse Width
PWTIM = tcyc + 20 ns
Input Capture,
Pulse Accumulator Input
PWTIM
1020
520
ns
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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