參數資料
型號： MC68HC11A0CFU2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP64
封裝： QFP-64
文件頁數： 20/158頁
文件大?。?/td> 3803K
代理商： MC68HC11A0CFU2
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MC68HC11A8
10-18
TECHNICAL DATA
10
Table 10-5 Cycle-by-Cycle Operation — Extended Mode (Sheet 1 of 2)
Reference
Number*
Address Mode
and Instructions
Cycles Cycle
#
Address Bus
R/W
Line
Data Bus
5-1
JMP
3
1
2
3
Opcode Address
Opcode Address + 1
Opcode Address + 2
1
Opcode ($7E)
Jump Address (High Byte)
Jump Address (Low Byte)
5-2
ADCA, ADCB, ADDA,
ADDB, ANDA, ANDB,
BITA, BITB, CMPA,
CMPB, EORA, EORB,
LDAA, LDAB, ORAA
ORAB, SBCA, SBCB,
SUBA, SUBB
41
2
3
4
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
1
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data
5-3
STAA, STAB
4
1
2
3
4
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
1
0
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Accumulator Data
5-4
LDD, LDS, LDX
5
1
2
3
4
5
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
1
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
5-5
STD, STS, STX
5
1
2
3
4
5
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
1
0
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Register Data (High Byte)
Register Data (Low Byte)
5-6
LDY
6
1
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
Opcode Address + 3
Operand Address
Operand Address + 1
1
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($FE)
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
5-7
STY
6
1
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
Opcode Address + 3
Operand Address
Operand Address + 1
1
0
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($FF)
Operand Address (High Byte)
Operand Address (Low Byte)
Register Data (High Byte)
Register Data (Low Byte)
5-8
ASL, ASR, CLR,
COM, DEC, INC,
LSL, LSR, NEG,
ROL, ROR
61
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
$FFFF
Operand Address
1
0
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Original Operand Data
Irrelevant Data
Result Operand Data
5-9
TST
6
1
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
$FFFF
1
Opcode ($7D)
Operand Address (High Byte)
Operand Address (Low Byte)
Original Operand Data
Irrelevant Data
5-10
ADDD, CPX, SUBD
6
1
2
3
4
5
6
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
$FFFF
1
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
Irrelevant Data
*The reference number is given to provide a cross-reference to Table 10-1.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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