參數(shù)資料
型號: MC68HC11A8BCFN2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 158/158頁
文件大?。?/td> 3803K
代理商: MC68HC11A8BCFN2
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
TECHNICAL DATA
10-1
10
10 CPU, ADDRESSING MODES, AND INSTRUCTION SET
This section provides a description of the CPU registers, addressing modes, and a
summary of the M68HC11 instruction set. Special operations such as subroutine calls
and interrupts are described and cycle-by-cycle operations for all instructions are pre-
sented.
10.1 CPU Registers
In addition to being able to execute all M6800 and M6801 instructions, the
MC68HC11A8 uses a 4-page opcode map to allow execution of 91 new opcodes (see
10.2.7 Prebyte). Seven registers, discussed in the following paragraphs, are available
to programmers as shown in Figure 10-1.
10.1.1 Accumulators A and B
Accumulator A and accumulator B are general-purpose 8-bit registers used to hold
operands and results of arithmetic calculations or data manipulations. These two ac-
cumulators can be concatenated into a single 16-bit accumulator called the D accu-
mulator.
10.1.2 Index Register X (IX)
The 16-bit IX register is used for indexed mode addressing. It provides a 16-bit index-
ing value which is added to an 8-bit offset provided in an instruction to create an effec-
tive address. The IX register can also be used as a counter or as a temporary storage
register.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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