參數(shù)資料
型號： MC68HC901FNR2
廠商： MOTOROLA INC
元件分類： 外設(shè)及接口
英文描述： MULTIFUNCTION PERIPHERAL, PQCC52
封裝： PLASTIC, LCC-52
文件頁數(shù)： 56/73頁
文件大小： 274K
代理商： MC68HC901FNR2
PRELIMINARY
MOTOROLA
MC68HC901 USER’S MANUAL
vii
TABLE OF CONTENTS
Paragraph
Page
Number
Title
Number
Section 1
Introduction
1.1
Key Features .............................................................................................1-2
1.2
Register Programming ...............................................................................1-2
Section 2
Signal Description
2.1
Power Supply (VCC and GND) .................................................................. 2-1
2.2
Clock (CLK) .............................................................................................. 2-2
2.3
Data Bus (D7–D0) .................................................................................... 2-2
2.4
Asynchronous Bus Control ....................................................................... 2-2
2.4.1
Chip Select (CS) .................................................................................. 2-2
2.4.2
Data Strobe (DS) ................................................................................. 2-2
2.4.3
Read/Write (R/W) ................................................................................ 2-2
2.4.4
Data Transfer Acknowledge (DTACK) ................................................. 2-2
2.5
Register Select Bus (RS1–RS5) ............................................................... 2-2
2.6
Reset (RESET) ......................................................................................... 2-2
2.7
Interrupt Control ........................................................................................ 2-3
2.7.1
Interrupt Request (IRQ) ....................................................................... 2-3
2.7.2
Interrupt Acknowledge (IACK) ............................................................. 2-3
2.7.3
Interrupt Enable In (IEI) ....................................................................... 2-3
2.7.4
Interrupt Enable Out (IEO) ................................................................... 2-3
2.8
General Purpose I/O Interrupt Lines (I7–I0) ............................................. 2-3
2.9
Timer Control ............................................................................................ 2-4
2.9.1
Timer Inputs (TAI and TBI) .................................................................. 2-4
2.9.2
Timer Outputs (TAO, TBO, TCO, and TDO) ....................................... 2-4
2.9.3
Timer Clock (XTAL1 and XTAL2) ........................................................ 2-4
2.10
Serial I/O Control ...................................................................................... 2-4
2.10.1
Serial Input (SI) .................................................................................... 2-4
2.10.2
Serial Output (SO) ............................................................................... 2-5
2.10.3
Receiver Clock (RC) ............................................................................ 2-5
2.10.4
Transmitter Clock (TC) ........................................................................ 2-5
2.11
Direct Memory Access Control ................................................................. 2-5
2.11.1
Receiver Ready (RR) .......................................................................... 2-5
2.11.2
Transmitter Ready (TR) ....................................................................... 2-5
2.12
Signal Summary ....................................................................................... 2-5
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