參數(shù)資料
型號： MC68HCL05C4AFN
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 16/156頁
文件大?。?/td> 992K
代理商： MC68HCL05C4AFN
NON-DISCLOSURE
AGREEMENT
REQUIRED
General
Release
Specification
MC68HC05C4A
—
Rev.
4.0
112
Instruction
Set
Instr
uction
Set
Table 12-7. Opcode Map
Bit Manipulation
Branch
Read-Modify-Write
Control
Register/Memory
DIR
REL
DIR
INH
IX1
IX
INH
IMM
DIR
EXT
IX2
IX1
IX
0123456789
ABCD
E
F
0
5
BRSET0
3
DIR
5
BSET0
2
DIR
3
BRA
2
REL
5
NEG
2
DIR
3
NEGA
1
INH
3
NEGX
1
INH
6
NEG
2
IX1
5
NEG
1IX
9
RTI
1
INH
2
SUB
2
IMM
3
SUB
2
DIR
4
SUB
3
EXT
5
SUB
3
IX2
4
SUB
2
IX1
3
SUB
1IX
0
1
5
BRCLR0
3
DIR
5
BCLR0
2
DIR
3
BRN
2
REL
6
RTS
1
INH
2
CMP
2
IMM
3
CMP
2
DIR
4
CMP
3
EXT
5
CMP
3
IX2
4
CMP
2
IX1
3
CMP
1IX
1
2
5
BRSET1
3
DIR
5
BSET1
2
DIR
3
BHI
2
REL
11
MUL
1
INH
2
SBC
2
IMM
3
SBC
2
DIR
4
SBC
3
EXT
5
SBC
3
IX2
4
SBC
2
IX1
3
SBC
1IX
2
3
5
BRCLR1
3
DIR
5
BCLR1
2
DIR
3
BLS
2
REL
5
COM
2
DIR
3
COMA
1
INH
3
COMX
1
INH
6
COM
2
IX1
5
COM
1IX
10
SWI
1
INH
2
CPX
2
IMM
3
CPX
2
DIR
4
CPX
3
EXT
5
CPX
3
IX2
4
CPX
2
IX1
3
CPX
1IX
3
4
5
BRSET2
3
DIR
5
BSET2
2
DIR
3
BCC
2
REL
5
LSR
2
DIR
3
LSRA
1
INH
3
LSRX
1
INH
6
LSR
2
IX1
5
LSR
1IX
2
AND
2
IMM
3
AND
2
DIR
4
AND
3
EXT
5
AND
3
IX2
4
AND
2
IX1
3
AND
1IX
4
5
5
BRCLR2
3
DIR
5
BCLR2
2
DIR
3
BCS/BLO
2
REL
2
BIT
2
IMM
3
BIT
2
DIR
4
BIT
3
EXT
5
BIT
3
IX2
4
BIT
2
IX1
3
BIT
1IX
5
6
5
BRSET3
3
DIR
5
BSET3
2
DIR
3
BNE
2
REL
5
ROR
2
DIR
3
RORA
1
INH
3
RORX
1
INH
6
ROR
2
IX1
5
ROR
1IX
2
LDA
2
IMM
3
LDA
2
DIR
4
LDA
3
EXT
5
LDA
3
IX2
4
LDA
2
IX1
3
LDA
1IX
6
7
5
BRCLR3
3
DIR
5
BCLR3
2
DIR
3
BEQ
2
REL
5
ASR
2
DIR
3
ASRA
1
INH
3
ASRX
1
INH
6
ASR
2
IX1
5
ASR
1IX
2
TAX
1
INH
4
STA
2
DIR
5
STA
3
EXT
6
STA
3
IX2
5
STA
2
IX1
4
STA
1IX
7
8
5
BRSET4
3
DIR
5
BSET4
2
DIR
3
BHCC
2
REL
5
ASL/LSL
2
DIR
3
ASLA/LSLA
1
INH
3
ASLX/LSLX
1
INH
6
ASL/LSL
2
IX1
5
ASL/LSL
1IX
2
CLC
1
INH
2
EOR
2
IMM
3
EOR
2
DIR
4
EOR
3
EXT
5
EOR
3
IX2
4
EOR
2
IX1
3
EOR
1IX
8
9
5
BRCLR4
3
DIR
5
BCLR4
2
DIR
3
BHCS
2
REL
5
ROL
2
DIR
3
ROLA
1
INH
3
ROLX
1
INH
6
ROL
2
IX1
5
ROL
1IX
2
SEC
1
INH
2
ADC
2
IMM
3
ADC
2
DIR
4
ADC
3
EXT
5
ADC
3
IX2
4
ADC
2
IX1
3
ADC
1IX
9
A
5
BRSET5
3
DIR
5
BSET5
2
DIR
3
BPL
2
REL
5
DEC
2
DIR
3
DECA
1
INH
3
DECX
1
INH
6
DEC
2
IX1
5
DEC
1IX
2
CLI
1
INH
2
ORA
2
IMM
3
ORA
2
DIR
4
ORA
3
EXT
5
ORA
3
IX2
4
ORA
2
IX1
3
ORA
1IX
A
B
5
BRCLR5
3
DIR
5
BCLR5
2
DIR
3
BMI
2
REL
2
SEI
1
INH
2
ADD
2
IMM
3
ADD
2
DIR
4
ADD
3
EXT
5
ADD
3
IX2
4
ADD
2
IX1
3
ADD
1IX
B
C
5
BRSET6
3
DIR
5
BSET6
2
DIR
3
BMC
2
REL
5
INC
2
DIR
3
INCA
1
INH
3
INCX
1
INH
6
INC
2
IX1
5
INC
1IX
2
RSP
1
INH
2
JMP
2
DIR
3
JMP
3
EXT
4
JMP
3
IX2
3
JMP
2
IX1
2
JMP
1IX
C
D
5
BRCLR6
3
DIR
5
BCLR6
2
DIR
3
BMS
2
REL
4
TST
2
DIR
3
TSTA
1
INH
3
TSTX
1
INH
5
TST
2
IX1
4
TST
1IX
2
NOP
1
INH
6
BSR
2
REL
5
JSR
2
DIR
6
JSR
3
EXT
7
JSR
3
IX2
6
JSR
2
IX1
5
JSR
1IX
D
E
5
BRSET7
3
DIR
5
BSET7
2
DIR
3
BIL
2
REL
2
STOP
1
INH
2
LDX
2
IMM
3
LDX
2
DIR
4
LDX
3
EXT
5
LDX
3
IX2
4
LDX
2
IX1
3
LDX
1IX
E
F
5
BRCLR7
3
DIR
5
BCLR7
2
DIR
3
BIH
2
REL
5
CLR
2
DIR
3
CLRA
1
INH
3
CLRX
1
INH
6
CLR
2
IX1
5
CLR
1IX
2
WAIT
1
INH
2
TXA
1
INH
4
STX
2
DIR
5
STX
3
EXT
6
STX
3
IX2
5
STX
2
IX1
4
STX
1IX
F
INH = Inherent
REL = Relative
IMM = Immediate
IX = Indexed, No Offset
DIR = Direct
IX1 = Indexed, 8-Bit Offset
EXT = Extended
IX2 = Indexed, 16-Bit Offset
0
MSB of Opcode in Hexadecimal
LSB of Opcode in Hexadecimal
0
5
BRSET0
3
DIR
Number of Cycles
Opcode Mnemonic
Number of Bytes/Addressing Mode
LSB
MSB
LSB
MSB
LSB
MSB
相關(guān)PDF資料
PDF描述
MC68HSC05C4AFN 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44
MC68HCL05C4AP 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
MC68HCL05C4AB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HC05C4P 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
MC68HC05C4FN 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
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參數(shù)描述
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