參數(shù)資料
型號: MC68HSC05C8A
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁數(shù): 60/156頁
文件大?。?/td> 755K
代理商: MC68HSC05C8A
L
G
R
Timer
General Release Specification
MC68HC05C8A
Rev. 3.0
60
Timer
MOTOROLA
8.7 Timer Status Register
The TSR is a read-only register containing three status flag bits.
ICF — Input Capture Flag
1 = Flag set when selected polarity edge is sensed by input capture
edge detector
0 = Flag cleared when TSR and input capture low register ($15) are
accessed
OCF — Output Compare Flag
1 = Flag set when output compare register contents match the free-
running counter contents
0 = Flag cleared when TSR and output compare low register ($17)
are accessed
TOF — Timer Overflow Flag
1 = Flag set when free-running counter transition from $FFFF to
$0000 occurs
0 = Flag cleared when TSR and counter low register ($19) are
accessed
Bits 0–4 — Not used
Always read 0
Accessing the timer status register satisfies the first condition required
to clear status bits. The remaining step is to access the register
corresponding to the status bit.
Address:
$13
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ICF
OCF
TOF
0
0
0
0
0
Write:
Reset:
U
U
U
0
0
0
0
0
U = Unaffected
Figure 8-5. Timer Status Register (TSR)
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