參數(shù)資料
型號: MC68HSC05C8AFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 128/166頁
文件大?。?/td> 1914K
代理商: MC68HSC05C8AFB
Timer
Technical Data
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A — Rev. 5.0
64
Timer
MOTOROLA
After a read of the input capture register ($14) MSB, the counter transfer
is inhibited until the LSB ($15) is also read. This characteristic causes
the time used in the input capture software routine and its interaction with
the main program to determine the minimum pulse period.
A read of the input capture register LSB ($15) does not inhibit the free-
running counter transfer, since they occur on opposite edges of the
internal bus clock. Figure 8-3 shows the logic of the input capture
function.
Figure 8-3. Input Capture Operation
INPUT CAPTURE REGISTER HIGH
INPUT CAPTURE REGISTER LOW
TIMER REGISTER HIGH
TCMP
EDGE
SELECT/DETECT
LOGIC
TIMER
INTERRUPT
REQUEST
TIMER REGISTER LOW
15
0
15
8 7
0
TIMER STATUS REGISTER
$0013
TIMER CONTROL REGISTER
$0012
ICIE
OC
IE
TO
IE
ICF
OC
F
TO
F
87
$0018
$0019
$0014
$0015
IEDG
LATCH
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