參數(shù)資料
型號: MC68HSC05C8AFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 130/166頁
文件大?。?/td> 1914K
代理商: MC68HSC05C8AFB
Timer
Technical Data
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A — Rev. 5.0
66
Timer
MOTOROLA
Bits 2, 3, and 4 — Not used
Always read 0
8.7 Timer Status Register
The timer status register (TSR) is a read-only register containing three
status flag bits.
ICF — Input Capture Flag
1 = Flag set when selected polarity edge is sensed by input capture
edge detector
0 = Flag cleared when TSR and input capture low register ($15) are
accessed
OCF — Output Compare Flag
1 = Flag set when output compare register contents match the free-
running counter contents
0 = Flag cleared when TSR and output compare low register ($17)
are accessed
TOF — Timer Overflow Flag
1 = Flag set when free-running counter transition from $FFFF to
$0000 occurs
0 = Flag cleared when TSR and counter low register ($19) are
accessed
Bits 0–4 — Not used
Always read 0
Address:
$0013
Bit 7
654321
Bit 0
Read:
ICF
OCF
TOF
00000
Write:
Reset:
U
00000
= Unimplemented
U = Unaffected
Figure 8-5. Timer Status Register (TSR)
相關(guān)PDF資料
PDF描述
MC68HC05C8AVN 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
MC68HCL05C8AB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HSC05C8CFB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
MC68HC05C8AMB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HSC05C8AB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP42
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