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參數(shù)資料
| 型號(hào)： | MC68HSC05C8CFN |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 38/116頁(yè) |
| 文件大?。?/td> | 781K |
| 代理商： | MC68HSC05C8CFN |
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Central Processor Unit (CPU)
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
28
Freescale Semiconductor
3.2.1 Accumulator
The accumulator (A) shown in Figure 3-1 is a general-purpose 8-bit register used to hold operands and
results of arithmetic calculations or data manipulations.
3.2.2 Index Register
The index register (X) is an 8-bit register used by the indexed addressing value to create an effective
address. The index register also may be used as a temporary storage area.
3.2.3 Program Counter
The program counter (PC) is a 13-bit register that contains the address of the next byte to be fetched.
3.2.4 Stack Pointer
The stack pointer (SP) contains the address of the next free location on the stack. During an MCU reset
or the reset stack pointer (RSP) instruction, the stack pointer is set to location $00FF. The stack pointer
is then decremented as data is pushed onto the stack and incremented as data is pulled from the stack.
When accessing memory, the seven most significant bits (MSB) are permanently set to 0000011. These
eight bits are appended to the six least significant register bits (LSB) to produce an address within the
range of $00FF to $00C0. Subroutines and interrupts may use up to 64 (decimal) locations. If 64 locations
are exceeded, the stack pointer wraps around and loses the previously stored information. A subroutine
call occupies two locations on the stack; an interrupt uses five locations.
3.2.5 Condition Code Register
The condition code register (CCR) is a 5-bit register in which four bits are used to indicate the results of
the instruction just executed, and the fifth bit indicates whether interrupts are masked. These bits can be
tested individually by a program, and specific actions can be taken as a result of their state. Each bit is
explained here.
H — Half Carry
This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4.
I — Interrupt
When this bit is set, the timer and external interrupt are masked (disabled). If an interrupt occurs while
this bit is set, the interrupt is latched and processed as soon as the interrupt bit is cleared.
N — Negative
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
negative.
Z — Zero
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was 0.
C — Carry/Borrow
When set, this bit indicates that a carry or borrow out of the arithmetic logical unit (ALU) occurred
during the last arithmetic operation. This bit also is affected during bit test and branch instructions and
during shifts and rotates.
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