參數(shù)資料
型號: MC68MH360VR25L
廠商: Freescale Semiconductor
文件頁數(shù): 152/158頁
文件大小: 0K
描述: IC MPU QUICC 25MHZ 357-PBGA
標(biāo)準(zhǔn)包裝: 44
系列: M683xx
處理器類型: M683xx 32-位
速度: 25MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應(yīng)商設(shè)備封裝: 357-PBGA(25x25)
包裝: 托盤
Chapter 6. QMC Initialization
Step 5: Congure port C for TDMa and/or TDMb signals L1ST1, 2, 3, and/or 4;
L1TSYNCx and/or L1RSYNCx. For more information on port C, see page 7-365 of the
MC68360 User’s Manual and page 16-465 of the MPC860 User’s Manual.
The following setting enables L1RSYNCx, L1TSYNCx, and all L1STx strobes. Note that
if common clocking is used, selected by the CRTx bit in the SI MODE register, only
L1RSYNCx is required. Note that the L1STx functions are repeated on Port B and should
only be congured on one port.
PCPAR = 0x0F0F;
/* init port C pin assignment register */
PCDIR = 0x000F;
/* init port C data direction register */
Step 6: Write the values to the SI RAM locations that will route the time slots required. For
more information on SI RAM programming, see page 7-72 of the MC68360 User’s Manual
and page 16-106 of the MPC860 User’s Manual.
The following example congures every byte to be transferred to SCC1; note that the nal
entry in both the Tx and Rx tables has the LST bit set. Also, this example for TDMa
assumes that SIGMR[RDM] is set to 0b10 (32 entries for Rx and Tx). If n is the last entry,
the following applies:
SIRAM[0] = 0x0042;
/* init 1st receive element */
SIRAM[1] = 0x0042;
/* init 2nd receive element */
SIRAM[n-1] = 0x0043;
/* init nth receive element */
SIRAM[32] = 0x0042;
/* init 1st xmit element */
SIRAM[33] = 0x0042;
/* init 2nd xmit element */
SIRAM[34] = 0x0042;
/* init 3rd xmit element */
SIRAM[32+n] = 0x0043;
/* init nth xmit element */
NOTE
On the MH360, the SI RAM is mapped in a continuous 256-
byte block from REGB + 700->7FF. On the 860MH, it is
mapped to a 512-byte block from C00->DFF. Also on the
860MH, the SI RAM has 16-bit entries aligned to 32-bit
boundaries; therefore, only half of the actual address space is
valid (there are 256 valid bytes).
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料
PDF描述
MC68MH360CVR25L IC MPU QUICC 25MHZ 357-PBGA
HMC40DTEI CONN EDGECARD 80POS .100 EYELET
FMC50DRAS-S734 CONN EDGECARD 100PS .100 R/A SLD
EMC40DTEF CONN EDGECARD 80POS .100 EYELET
AMM22DREI CONN EDGECARD 44POS .156 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68MH360VR25LR2 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360VR25VL 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360VR33L 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360VR33LR2 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360ZP25L 功能描述:IC MPU 32BIT QUICC 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA(25x25) 包裝:托盤