參數(shù)資料
型號(hào)： MC705P6AMPE
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 54/98頁(yè)
文件大小： 0K
描述： IC MCU 8BIT 4.5K FLASH 28-PDIP
標(biāo)準(zhǔn)包裝： 13
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 21
程序存儲(chǔ)器容量： 4.5KB（4.5K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 176 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 28-DIP（0.600"，15.24mm）
包裝： 管件
EPROM
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
58
Freescale Semiconductor
EPGM — EPROM Program Control
If the EPGM bit is set, programming power is applied to the EPROM array. If the EPGM bit is cleared,
programming power is removed from the EPROM array. The EPGM bit cannot be set unless the ELAT
bit is set already.
Whenever the ELAT bit is cleared, the EPGM bit is cleared also. Both the EPGM and the ELAT bit
cannot be set using the same write instruction. Any attempt to set both the EPGM and ELAT bit on the
same write instruction cycle will result in the ELAT bit being set and the EPGM bit being cleared. The
EPGM bit is a read-write bit and can be read at any time. The EPGM bit is cleared by reset.
ELAT— EPROM Latch Control
If the ELAT bit is set, the EPROM address and data bus are configured for programming to the array.
If the ELAT bit is cleared, the EPROM address and data bus are configured for normal reading of data
from the array. When the ELAT bit is set, the address and data bus are latched in the EPROM array
when a subsequent write to the array is made. Data in the EPROM array cannot be read if the ELAT
bit is set.
Whenever the ELAT bit is cleared, the EPGM bit is cleared also. Both the EPGM and the ELAT bit
cannot be set using the same write instruction. Any attempt to set both the EPGM and ELAT bit on the
same write instruction cycle will result in the ELAT bit being set and the EPGM bit being cleared. The
ELAT bit is a read-write bit and can be read at any time. The ELAT bit is cleared by reset.
To program a byte of EPROM, manipulate the EPROG register as follows:
1.
Set the ELAT bit in the EPROG register.
2.
Write the desired data to the desired EPROM address.
3.
Set the EPGM bit in the EPROG register for the specified programming time, t
EPGM
.
4.
Clear the ELAT and EPGM bits in the EPROG register.
This sequence is also shown in the sample program listing in Table 10-1.
Address $001C
Bit 7
654321
Bit 0
Read:
00000
ELAT
0
EPGM
Write:
Reset:
00000000
= Unimplemented
Figure 10-1. EPROM Programming Register (EPROG)
Table 10-1. EPROM Programming Routine
001C
0055
0700
0000
EPROG
DATA
EPROM
EPGM
EQU $1C
EQU $55
EQU $700
EQU $00
PROGRAMMING REG
DATA VALUE
A SAMPLE EPROM ADX
EPGM BIT IN EPROG REG
00D0
ORG
$D0
00D0
00D2
00D4
00D6
00D9
00DB
00DD
00DF
A6 02
B7 1C
A6 55
C7 07 00
10 1C
AD 03
3F 1C
81
LDA #$04
STA EPROG
LDA #DATA
STA EPROM
BSET EPGM, EPROG
BSR DELAY
CLR EPROG
RTS
SET LAT BIT IN EPROG
DATA BYTE
WRITE IT TO EPROM LOC
TURN ON PGM VOLTAGE
WAIT 4 ms MINIMUM
CLR LAT AND PGM BITS
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