MC74HC589A
http://onsemi.com
6
TIMING REQUIREMENTS (Input tr = tf = 6 ns, Note NO TAG)
VCC
Guaranteed Limit
Symbol
Parameter
V
*55_C to 25_C v85_C v125_C
Unit
tsu
Minimum Setup Time, AH to Latch Clock
2.0
3.0
4.5
6.0
100
40
20
17
125
50
25
21
150
60
30
26
ns
tsu
Minimum Setup Time, Serial Data Input SA to Shift Clock
2.0
3.0
4.5
6.0
100
40
20
17
125
50
25
21
150
60
30
26
ns
tsu
Minimum Setup Time, Serial Shift/Parallel Load to Shift Clock
2.0
3.0
4.5
6.0
100
40
20
17
125
50
25
21
150
60
30
26
ns
th
Minimum Hold Time, Latch Clock to AH
2.0
3.0
4.5
6.0
25
10
5
30
12
6
40
15
8
7
ns
th
Minimum Hold Time, Shift Clock to Serial Data Input SA
2.0
3.0
4.5
6.0
5
5
5
ns
tw
Minimum Pulse Width, Shift Clock
2.0
3.0
4.5
6.0
75
40
15
13
95
50
19
16
110
60
23
19
ns
tw
Minimum Pulse Width, Latch Clock
2.0
3.0
4.5
6.0
80
40
16
14
100
50
20
17
120
60
24
20
ns
tw
Minimum Pulse Width, Serial Shift/Parallel Load
2.0
3.0
4.5
6.0
80
40
16
14
100
50
20
17
120
60
24
20
ns
tr, tf
Maximum Input Rise and Fall Times
2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns