- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8463 > MC74HC589ANG (ON Semiconductor)IC SHIFT REGISTER 8BIT 16-DIP PDF資料下載
參數(shù)資料
| 型號(hào)： | MC74HC589ANG |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 13/14頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SHIFT REGISTER 8BIT 16-DIP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 系列： | 74HC |
| 邏輯類型： | 移位寄存器 |
| 輸出類型： | 標(biāo)準(zhǔn) |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 功能： | 通用 |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1123 (CN2011-ZH PDF) |
| 其它名稱： | MC74HC589ANGOS |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)
MC74HC589A
http://onsemi.com
8
AH
50%
LATCH
CLOCK
VCC
GND
*Includes all probe and jig capacitance.
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
DATA
VALID
tsu
th
SA
50%
SHIFT
CLOCK
VCC
GND
tsu
th
SERIAL SHIFT/
PARALLEL
LOAD
50%
SHIFT
CLOCK
VCC
GND
tsu
Figure 7.
Figure 8.
Figure 9.
Figure 10. Test Circuit
Switching Waveforms
Figure 11. Test Circuit
*Includes all probe and jig capacitance.
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
1 kW
DATA
VALID
Pin Descriptions
Data Inputs
A, B, C, D, E, F, G, H (Pins 15, 1, 2, 3, 4, 5, 6, 7)
Parallel data inputs. Data on these inputs are stored in the
data latch on the rising edge of the Latch Clock input.
SA (Pin 14)
Serial data input. Data on this input is shifted into the shift
register on the rising edge of the Shift Clock input if Serial
Shift/Parallel Load is high. Data on this input is ignored
when Serial Shift/Parallel Load is low.
Control Inputs
Serial Shift/Parallel Load (Pin 13)
Shift register mode control. When a high level is applied
to this pin, the shift register is allowed to serially shift data.
When a low level is applied to this pin, the shift register
accepts parallel data from the data latch.
Shift Clock (Pin 11)
Serial shift clock. A lowtohigh transition on this input
shifts data on the serial data input into the shift register and
data in stage H is shifted out QH, being replaced by the data
previously stored in stage G.
Latch Clock (Pin 12)
Data latch clock. A lowtohigh transition on this input
loads the parallel data on inputs AH into the data latch.
Output Enable (Pin 10)
Activelow output enable A high level applied to this pin
forces the QH output into the high impedance state. A low
level enables the output. This control does not affect the state
of the input latch or the shift register.
Output
QH (Pin 9)
Serial data output. This pin is the output from the last stage
of the shift register. This is a 3state output.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC74HC595ANG | IC SHIFT REGISTER 8BIT 3ST 16DIP |
| HR25A-9J-16PC | CONN JACK 16POS MALE CRIMP |
| VE-B14-MU-F1 | CONVERTER MOD DC/DC 48V 200W |
| HR25A-9J-16SC | CONN JACK 16POS FEMALE CRIMP |
| V24A6V5M400BF2 | CONVERTER MOD DC/DC 6.5V 400W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74HC589ANG | 制造商:ON Semiconductor 功能描述:Gate / Inverter Logic IC |
| MC74HC589N | 制造商:Freescale Semiconductor 功能描述: |
| MC74HC58DR2 | 制造商:Motorola Inc 功能描述:HC/UH SERIES, DUAL 6-INPUT AND-OR GATE, PDSO14 |
| MC74HC58FEL | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| MC74HC58N | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。