參數(shù)資料
型號: MC74HCT125ADG
廠商: ON Semiconductor
文件頁數(shù): 1/8頁
文件大?。?/td> 0K
描述: IC BUFFER NONINV QUAD 3ST 14SOIC
標準包裝: 55
系列: 74HCT
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 4
每個元件的位元數(shù): 1
輸出電流高,低: 6mA,6mA
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC(窄型)
包裝: 管件
Semiconductor Components Industries, LLC, 2009
November, 2009 Rev. 1
1
Publication Order Number:
MC74HCT125A/D
MC74HCT125A
Quad 3-State Noninverting
Buffer with LSTTL
Compatible Inputs
HighPerformance SiliconGate CMOS
The MC74HCT125A is identical in pinout to the LS125. The device
inputs are compatible with standard CMOS and LSTTL outputs.
The MC74HCT125A noninverting buffer is designed to be used
with 3state memory address drivers, clock drivers, and other
busoriented systems. The devices have four separate output enables
that are activelow.
Features
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7A Requirements
Chip Complexity: 72 FETs or 18 Equivalent Gates
These are PbFree Devices
LOGIC DIAGRAM
ActiveLow Output Enables
Y1
Y2
Y4
3
6
8
11
13
12
10
9
4
5
1
2
A1
OE1
A2
OE2
A3
OE3
A4
OE4
PIN 14 = VCC
PIN 7 = GND
Y3
FUNCTION TABLE
HCT125A
Inputs
Output
AOE
Y
HL
H
LL
L
XH
Z
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
OE3
Y4
A4
OE4
VCC
Y3
A3
OE2
Y1
A1
OE1
GND
Y2
A2
http://onsemi.com
MARKING
DIAGRAMS
A
=
Assembly Location
L, WL
=
Wafer Lot
Y, YY
=
Year
W, WW =
Work Week
G
= PbFree Package
G
= PbFree Package
(Note: Microdot may be in either location)
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOEIAJ14
F SUFFIX
CASE 965
SOIC14
D SUFFIX
CASE 751A
14
1
14
74HCT125A
ALYWG
HCT125AG
AWLYWW
14
1
14
HCT
125A
ALYWG
G
1
14
1
PDIP14
N SUFFIX
CASE 646
MC74HCT125AN
AWLYYWWG
1
14
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
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