參數(shù)資料
型號: MC74HCT32AD
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Octal 2-Input OR Gate with LSTTL Compatible Inputs
中文描述: HCT SERIES, QUAD 2-INPUT OR GATE, PDSO14
封裝: PLASTIC, SOIC-14
文件頁數(shù): 2/5頁
文件大?。?/td> 175K
代理商: MC74HCT32AD
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
Power Dissipation in Still Air,Plastic or Ceramic DIP
750
500
mW
Tstg
Storage Temperature
SOIC Package
– 65 to + 150
C
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
(Ceramic DIP)
300
TA
tr, tf
DC Supply Voltage (Referenced to GND)
4.5
5.5
V
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
0
– 55
+ 125
V
C
Input Rise and Fall Time (Figure 1)
0
500
ns
Symbol
Parameter
Test Conditions
Volts
Min
Max
Min
4.5
Max
VIH
Minimum High–Level
Vout = 0.1 V or VCC – 0.1 V
20
A
Vin = VIH or VIL
|Iout|
20
μ
A
Vin = VIH or VIL
2.0
2.0
Min
2.0
Max
Unit
Input Voltage
5.5
0.8
0.8
0.8
V
Minimum High–Level
4.5
4.4
4.4
4.4
V
Output Voltage
5.5
0.1
0.1
0.1
Current
ICC
Maximum Quiescent Sup-
Vin = VCC or GND
5.5
1.0
10
40
μ
A
Additional Quiescent
5.5
2.9
2.4
mA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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