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參數(shù)資料
| 型號： | MC80C52EXXX-25/883:D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40 |
| 封裝： | 0.600 INCH, SIDE BRAZED, DIP-40 |
| 文件頁數(shù)： | 17/141頁 |
| 文件大?。?/td> | 7628K |
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199
8021G–AVR–03/11
ATmega329P/3290P
The 4-bit counter can be both read and written via the data bus, and can generate an overflow
interrupt. Both the Serial Register and the counter are clocked simultaneously by the same clock
source. This allows the counter to count the number of bits received or transmitted and generate
an interrupt when the transfer is complete. Note that when an external clock source is selected
the counter counts both clock edges. In this case the counter counts the number of edges, and
not the number of bits. The clock can be selected from three different sources: The USCK pin,
Timer/Counter0 Compare Match or from software.
The Two-wire clock control unit can generate an interrupt when a start condition is detected on
the Two-wire bus. It can also generate wait states by holding the clock pin low after a start con-
dition is detected, or after the counter overflows.
20.3
Functional Descriptions
20.3.1
Three-wire Mode
The USI Three-wire mode is compliant to the Serial Peripheral Interface (SPI) mode 0 and 1, but
does not have the slave select (SS) pin functionality. However, this feature can be implemented
in software if necessary. Pin names used by this mode are: DI, DO, and USCK.
Figure 20-2. Three-wire Mode Operation, Simplified Diagram
Figure 20-2 shows two USI units operating in Three-wire mode, one as Master and one as
Slave. The two Shift Registers are interconnected in such way that after eight USCK clocks, the
data in each register are interchanged. The same clock also increments the USI’s 4-bit counter.
The Counter Overflow (interrupt) Flag, or USIOIF, can therefore be used to determine when a
transfer is completed. The clock is generated by the Master device software by toggling the
USCK pin via the PORT Register or by writing a one to the USITC bit in USICR.
SLAVE
MASTER
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DO
DI
USCK
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
DO
DI
USCK
PORTxn
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| MR80C52EXXX-12/883:R | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MC80C52XXX-16SHXXX:D | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| MQ80C52TXXX-30SBR | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
| MR83C154XXX-25/883D | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154CXXX-25P883R | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44 |
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