參數(shù)資料
型號(hào): MC850DECZQ50BUR2
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 15/72頁(yè)
文件大?。?/td> 0K
描述: IC MPU PQUICC 50MHZ 256-PBGA
標(biāo)準(zhǔn)包裝: 500
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 50MHz
電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
包裝: 帶卷 (TR)
MPC850 PowerQUICC Integrated Communications Processor Hardware Specifications, Rev. 2
22
Freescale Semiconductor
Bus Signal Timing
Figure 8 provides the timing for the input data controlled by the UPM in the memory controller.
Figure 8. Input Data Timing when Controlled by UPM in the Memory Controller
Figure 9 through Figure 12 provide the timing for the external bus read controlled by various GPCM
factors.
Figure 9. External Bus Read Timing (GPCM Controlled—ACS = 00)
CLKOUT
TA
D[0:31],
DP[0:3]
B20
B21
CLKOUT
A[6:31]
CSx
OE
WE[0:3]
TS
D[0:31],
DP[0:3]
B11
B12
B23
B8
B22
B26
B19
B18
B25
B28
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