參數(shù)資料
型號： MC8641DVU1250JB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù)： 97/140頁
文件大?。?/td> 1484K
代理商： MC8641DVU1250JB
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
6
Freescale Semiconductor
Electrical Characteristics
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
Table 1 provides the absolute maximum ratings.
Table 1. Absolute Maximum Ratings1
Characteristic
Symbol
Absolute Maximum
Value
Unit
Notes
Cores supply voltages
VDD_Core0,
VDD_Core1
-0.3 to 1.21 V
V
2
Cores PLL supply
AVDD_Core0,
AVDD_Core1
-0.3 to 1.21 V
V
SerDes Transceiver Supply (Ports 1 and 2)
SVDD
-0.3 to 1.21 V
V
SerDes Serial I/O Supply Port 1
XVDD_SRDS1
-0.3 to 1.21V
V
SerDes Serial I/O Supply Port 2
XVDD_SRDS2
-0.3 to 1.21 V
V
SerDes DLL and PLL supply voltage for Port 1 and Port 2
AVDD_SRDS1,
AVDD_SRDS2
-0.3 to 1.21V
V
Platform Supply voltage
VDD_PLAT
-0.3 to 1.21V
V
Local Bus and Platform PLL supply voltage
AVDD_LB,
AVDD_PLAT
-0.3 to 1.21V
V
DDR and DDR2 SDRAM I/O supply voltages
D1_GVDD,
D2_GVDD
-0.3 to 2.75 V
V
3
-0.3 to 1.98 V
V
3
eTSEC 1 and 2 I/O supply voltage
LVDD
-0.3 to 3.63 V
V
4
-0.3 to 2.75 V
V
4
eTSEC 3 and 4 I/O supply voltage
TVDD
-0.3 to 3.63 V
V
4
-0.3 to 2.75 V
V
4
Local Bus, DUART, DMA, Multiprocessor Interrupts, System
Control & Clocking, Debug, Test, Power management, I2C,
JTAG and Miscellaneous I/O voltage
OVDD
-0.3 to 3.63V
V
Input voltage
DDR and DDR2 SDRAM signals
D
n
_MV
IN
- 0.3 to (D
n_GVDD +
0.3)
V5
DDR and DDR2 SDRAM reference
D
n
_MVREF
- 0.3 to (D
n_GVDD/2 +
0.3)
V
Three-speed Ethernet signals
LVIN
TVIN
GND to (LVDD+ 0.3)
GND to (TVDD+ 0.3)
V
5
DUART, Local Bus, DMA,
Multiprocessor Interrupts, System
Control & Clocking, Debug, Test,
Power management, I2C, JTAG
and Miscellaneous I/O voltage
OVIN
GND to (OVDD+ 0.3)
V
5
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