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參數(shù)資料
型號: MC8641THX1000NC
廠商: Freescale Semiconductor
文件頁數(shù): 83/130頁
文件大?。?/td> 0K
描述: MPU E600 SGL CORE 994-FCCBGA
標準包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.0GHz
電壓: 0.95V
安裝類型: 表面貼裝
封裝/外殼: 994-BCBGA,F(xiàn)CCBGA
供應商設備封裝: 994-FCCBGA(33x33)
包裝: 托盤
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
56
Freescale Semiconductor
I
2C
Figure 34 provides the TRST timing diagram.
Figure 34. TRST Timing Diagram
Figure 35 provides the boundary-scan timing diagram.
Figure 35. Boundary-Scan Timing Diagram
12 I2C
This section describes the DC and AC electrical characteristics for the I2C interfaces of the MPC8641.
12.1
I2C DC Electrical Characteristics
Table 45 provides the DC electrical characteristics for the I2C interfaces.
Table 45. I2C DC Electrical Characteristics
At recommended operating conditions with OVDD of 3.3 V ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
Input high voltage level
VIH
0.7
× OVDD
OVDD +0.3
V
Input low voltage level
VIL
–0.3
0.3
× OVDD
V—
Low level output voltage
VOL
00.2
× OVDD
V1
Pulse width of spikes which must be suppressed by
the input filter
tI2KHKL
050
ns
2
Input current each I/O pin (input voltage is between
0.1
× OVDD and 0.9 × OVDD(max)
II
–10
10
μA3
TRST
VM = Midpoint Voltage (OVDD/2)
VM
tTRST
VM = Midpoint Voltage (OVDD/2)
VM
tJTDVKH
tJTDXKH
Boundary
Data Outputs
Boundary
Data Outputs
JTAG
External Clock
Boundary
Data Inputs
Output Data Valid
tJTKLDX
tJTKLDZ
tJTKLDV
Input
Data Valid
Output Data Valid
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